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LC75853NE Schematic ( PDF Datasheet ) - Sanyo Semicon Device

Teilenummer LC75853NE
Beschreibung 1/3 Duty LCD Display Drivers with Key Input Function
Hersteller Sanyo Semicon Device
Logo Sanyo Semicon Device Logo 




Gesamt 24 Seiten
LC75853NE Datasheet, Funktion
Ordering number : ENN4967C
CMOS IC
LC75853NE, 75853NW
1/3 Duty LCD Display Drivers
with Key Input Function
Overview
The LC75853NE and LC75853NW are 1/3 duty LCD
display drivers that can directly drive up to 126 segments
and can control up to four general-purpose output ports.
These products also incorporate a key scan circuit that
accepts input from up to 30 keys to reduce printed circuit
board wiring.
Features
• Key input function for up to 30 keys (A key scan is
performed only when a key is pressed.)
• 1/3 duty - 1/2 bias and 1/3 duty - 1/3 bias drive schemes
can be controlled from serial data (up to 126 segments).
• Sleep mode and all segments off functions that are
controlled from serial data
• Segment output port/general-purpose output port
function switching that is controlled from serial data
• Serial data I/O supports CCB format communication
with the system controller.
• Direct display of display data without the use of a
decoder provides high generality.
• Provision of an on-chip voltage-detection type reset
circuit prevents incorrect displays.
• RC oscillator circuit
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Package Dimensions
unit: mm
3159-QFP64E
1.0
48
49
[LC75853NE]
17.2
14.0 1.6
0.8 0.35 1.0
33
32
0.15
64
1
unit: mm
3190-SQFP64
17
16
0.1
2.7
15.6 0.8
SANYO: QFP64E
1.25
48
49
[LC75853NW]
12.0
10.0
0.5 0.18
1.25
33
32
0.15
64
1
17
16
0.5 0.5
SANYO: SQFP64
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
O3099TH (OT)/23099HA (OT)/N3095HA (OT)/52295TH (OT) No. 4967-1/24






LC75853NE Datasheet, Funktion
Pin Functions
Pin Pin No.
S1/P1 to S4/P4
S5 to S40
COM1
COM2
COM3
1 to 4
5 to 40
41
42
43
LC75853NE, 75853NW
Function
Segment outputs for displaying the display data transferred by serial data
input.
The S1/P1 to S4/P4 pins can be used as general-purpose output ports
under serial data control.
Common driver outputs
The frame frequency fO is given by: fO = (fOSC/384) Hz.
Active
Handling
I/O when unused
— O Open
— O Open
KS1/S41,
KS2/S42,
KS3 to KS6
44
45
46 to 49
Key scan outputs
Although normal key scan timing lines require diodes to be inserted in the
timing lines to prevent shorts, since these outputs are unbalanced CMOS
transistor outputs, these outputs will not be damaged by shorting when
these outputs are used to form a key matrix. The KS1/S41 and KS2/S42
pins can be used as segment outputs when so specified by the control data.
O Open
KI1 to KI5
OSC
CE
CL
DI
DO
TEST
VDD1
VDD2
VDD
VSS
50 to 54
60
62
63
64
61
55
57
58
56
59
Key scan inputs
These pins have built-in pull-down resistors.
Oscillator connection
An oscillator circuit is formed by connecting an external resistor and
capacitor at this pin.
Serial data interface connections to the controller. Note that DO, being an
open-drain output, requires a pull-up resistor.
CE: Chip enable
CL: Synchronization clock
DI: Transfer data
DO: Output data
This pin must be connected to ground.
Used for applying the LCD drive 2/3 bias voltage externally. Must be
connected to VDD2 when a 1/2 bias drive scheme is used.
Used for applying the LCD drive 1/3 bias voltage externally. Must be
connected to VDD1 when a 1/2 bias drive scheme is used.
Power supply connection. Provide a voltage of between 4.5 and 6.0 V.
Power supply connection. Connect to ground.
H I GND
— I/O VDD
HI
I GND
—I
— O Open
—I
— I Open
— I Open
——
——
No. 4967-6/24

6 Page









LC75853NE pdf, datenblatt
LC75853NE, 75853NW
Key input 1
Key input 2
Key scan
Serial data transfer Serial data transfer Key address (43H) Serial data transfer Key address
Key address
Key data read request
Key data read
Key data read
Key data read
Key data read request
Key data read request
3. In sleep mode
• The pins KS1 to KS6 are set to high or low by the S0 and S1 bits in the control data. (See the control data
description for details.)
• If a key on one of the lines corresponding to a KS1 to KS6 pin which is set high is pressed, the oscillator on the
OSC pin is started and a key scan is performed. Keys are scanned until all keys are released. Multiple key presses
are recognized by determining whether multiple key data bits are set.
• If a key is pressed for longer than 615 T (s) (where T = 1 ) the LC75853NE/NW outputs a key data read
fOSC
request (a low level on DO) to the controller. The controller acknowledges this request and reads the key data.
However, if CE is high during a serial data transfer, DO will be set high.
• After the controller reads the key data, the key data read request is cleared (DO is set high) and the
LC75853NE/NW performs another key scan. However, this does not clear sleep mode. Also note that DO, being
an open-drain output, requires a pull-up resistor (between 1 and 10 k).
• Sleep mode key scan example
Example: S0 = 0, S1 = 1 (sleep with only KS6 high)
When any one of these keys is pressed,
the oscillator on the OSC pin is started
and the keys are scanned.
Note: *4. These diodes are required to reliable recognize multiple key presses on the KS6 line when sleep mode state with only KS6 high, as in the
above example. That is, these diodes prevent incorrect operations due to sneak currents in the KS6 key scan output signal when keys on
the KS1 to KS5 lines are pressed at the same time.
No. 4967-12/24

12 Page





SeitenGesamt 24 Seiten
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