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R5F104ED Schematic ( PDF Datasheet ) - Renesas

Teilenummer R5F104ED
Beschreibung MCU
Hersteller Renesas
Logo Renesas Logo 




Gesamt 30 Seiten
R5F104ED Datasheet, Funktion
Datasheet
RL78/G14
RENESAS MCU
R01DS0053EJ0320
Rev. 3.20
Jan 05, 2015
True Low Power Platform (as low as 66 A/MHz, and 0.60 A for RTC + LVD), 1.6 V to 5.5 V operation,
16 to 512 Kbyte Flash, 44 DMIPS at 32 MHz, for General Purpose Applications
1. OUTLINE
1.1 Features
Ultra-Low Power Consumption Technology
• VDD = single power supply voltage of 1.6 to 5.5 V which
can operate a 1.8 V device at a low voltage
• HALT mode
• STOP mode
• SNOOZE mode
RL78 CPU Core
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed
from high speed (0.03125 s: @ 32 MHz operation with
high-speed on-chip oscillator) to ultra-low speed (30.5
s: @ 32.768 kHz operation with subsystem clock)
• Multiply/divide/multiply & accumulate instructions are
supported.
• Address space: 1 MB
• General-purpose registers: (8-bit register 8) 4 banks
• On-chip RAM: 2.5 to 48 KB
Code Flash Memory
• Code flash memory: 16 to 512 KB
• Block size: 1 KB
• Prohibition of block erase and rewriting (security
function)
• On-chip debug function
• Self-programming (with boot swap function/flash shield
window function)
Data Flash Memory
• Data flash memory: 4 KB and 8 KB
• Back ground operation (BGO): Instructions can be
executed from the program memory while rewriting the
data flash memory.
• Number of rewrites: 1,000,000 times (TYP.)
• Voltage of rewrites: VDD = 1.8 to 5.5 V
High-speed On-chip Oscillator
• Select from 64 MHz, 48 MHz, 32 MHz, 24 MHz, 16 MHz,
12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1
MHz
• High accuracy: ±1.0% (VDD = 1.8 to 5.5 V, TA = -20 to
+85°C)
Operating Ambient Temperature
• TA = -40 to +85°C (A: Consumer applications,
D: Industrial applications)
• TA = -40 to +105°C (G: Industrial applications)
Power Management and Reset Function
• On-chip power-on-reset (POR) circuit
• On-chip voltage detector (LVD) (Select interrupt and
reset from 14 levels)
Data Transfer Controller (DTC)
• Transfer modes: Normal transfer mode, repeat transfer
mode, block transfer mode
• Activation sources: Activated by interrupt sources.
• Chain transfer function
R01DS0053EJ0320 Rev. 3.20
Jan 05, 2015
Event Link Controller (ELC)
• Event signals of 19 to 26 types can be linked to the
specified peripheral function.
Serial Interfaces
• CSI: 3 to 8 channels
• UART/UART (LIN-bus supported): 3 or 4 channels
• I2C/simplified I2C: 3 to 8 channels
Timer
• 16-bit timer: 8 to 12 channels
(Timer Array Unit (TAU): 4 to 8 channels, Timer RJ: 1
channel, Timer RD: 2 channels, Timer RG: 1 channel)
• 12-bit interval timer: 1 channel
• Real-time clock: 1 channel (calendar for 99 years, alarm
function, and clock correction function)
• Watchdog timer: 1 channel (operable with the dedicated
low-speed on-chip oscillator)
A/D Converter
• 8/10-bit resolution A/D converter (VDD = 1.6 to 5.5 V)
• Analog input: 8 to 20 channels
• Internal reference voltage (1.45 V) and temperature
sensor
D/A Converter
• 8-bit resolution D/A converter (VDD = 1.6 to 5.5 V)
• Analog output: None or up to two channels
• Output voltage: 0 V to VDD
• Real-time output function
Comparator
• None or up to two channels
• Operating modes: Comparator high-speed mode,
comparator low-speed mode, window mode
• The external reference voltage or internal reference
voltage can be selected as the reference voltage.
I/O Port
• I/O port: 26 to 92 (N-ch open drain I/O [withstand
voltage of 6 V]: 2 to 4, N-ch open drain I/O [VDD
withstand voltage/EVDD withstand voltage]: 10 to 28)
• Can be set to N-ch open drain, TTL input buffer, and on-
chip pull-up resistor
• Different potential interface: Can connect to a 1.8/2.5/3
V device
• On-chip key interrupt function
• On-chip clock output/buzzer output controller
Others
On-chip BCD (binary-coded decimal) correction circuit
Remark The functions mounted depend on the product.
See 1.6 Outline of Functions.
Page 1 of 208






R5F104ED Datasheet, Funktion
RL78/G14
1. OUTLINE
<R>
<R>
Pin count
Package
48 pins 48-pin plastic LFQFP
(7 7 mm, 0.5 mm pitch)
48-pin plastic HWQFN
(7 7 mm, 0.5 mm pitch)
52 pins 52-pin plastic LQFP
(10 10 mm, 0.65 mm pitch)
(3/5)
Fields of
Application Note
Ordering Part Number
A R5F104GAAFB#V0, R5F104GCAFB#V0, R5F104GDAFB#V0, R5F104GEAFB#V0,
R5F104GFAFB#V0, R5F104GGAFB#V0, R5F104GHAFB#V0, R5F104GJAFB#V0
R5F104GAAFB#X0, R5F104GCAFB#X0, R5F104GDAFB#X0, R5F104GEAFB#X0,
R5F104GFAFB#X0, R5F104GGAFB#X0, R5F104GHAFB#X0, R5F104GJAFB#X0
R5F104GKAFB#30, R5F104GLAFB#30
R5F104GKAFB#50, R5F104GLAFB#50
D R5F104GADFB#V0, R5F104GCDFB#V0, R5F104GDDFB#V0, R5F104GEDFB#V0,
R5F104GFDFB#V0, R5F104GGDFB#V0, R5F104GHDFB#V0, R5F104GJDFB#V0
R5F104GADFB#X0, R5F104GCDFB#X0, R5F104GDDFB#X0, R5F104GEDFB#X0,
R5F104GFDFB#X0, R5F104GGDFB#X0, R5F104GHDFB#X0, R5F104GJDFB#X0
G R5F104GAGFB#V0, R5F104GCGFB#V0, R5F104GDGFB#V0, R5F104GEGFB#V0,
R5F104GFGFB#V0, R5F104GGGFB#V0, R5F104GHGFB#V0, R5F104GJGFB#V0
R5F104GAGFB#X0, R5F104GCGFB#X0, R5F104GDGFB#X0, R5F104GEGFB#X0,
R5F104GFGFB#X0, R5F104GGGFB#X0, R5F104GHGFB#X0, R5F104GJGFB#X0
R5F104GKGFB#30, R5F104GLGFB#30
R5F104GKGFB#50, R5F104GLGFB#50
A R5F104GAANA#U0, R5F104GCANA#U0, R5F104GDANA#U0, R5F104GEANA#U0,
R5F104GFANA#U0, R5F104GGANA#U0, R5F104GHANA#U0, R5F104GJANA#U0
R5F104GAANA#W0, R5F104GCANA#W0, R5F104GDANA#W0, R5F104GEANA#W0,
R5F104GFANA#W0, R5F104GGANA#W0, R5F104GHANA#W0, R5F104GJANA#W0
R5F104GKANA#U0, R5F104GLANA#U0
R5F104GKANA#W0, R5F104GLANA#W0
D R5F104GADNA#U0, R5F104GCDNA#U0, R5F104GDDNA#U0, R5F104GEDNA#U0,
R5F104GFDNA#U0, R5F104GGDNA#U0, R5F104GHDNA#U0, R5F104GJDNA#U0
R5F104GADNA#W0, R5F104GCDNA#W0, R5F104GDDNA#W0, R5F104GEDNA#W0,
R5F104GFDNA#W0, R5F104GGDNA#W0, R5F104GHDNA#W0, R5F104GJDNA#W0
G R5F104GAGNA#U0, R5F104GCGNA#U0, R5F104GDGNA#U0, R5F104GEGNA#U0,
R5F104GFGNA#U0, R5F104GGGNA#U0, R5F104GHGNA#U0, R5F104GJGNA#U0
R5F104GAGNA#W0, R5F104GCGNA#W0, R5F104GDGNA#W0, R5F104GEGNA#W0,
R5F104GFGNA#W0, R5F104GGGNA#W0, R5F104GHGNA#W0, R5F104GJGNA#W0
R5F104GKGNA#U0, R5F104GLGNA#U0
R5F104GKGNA#W0, R5F104GLGNA#W0
A R5F104JCAFA#V0, R5F104JDAFA#V0, R5F104JEAFA#V0, R5F104JFAFA#V0,
R5F104JGAFA#V0, R5F104JHAFA#V0, R5F104JJAFA#V0
R5F104JCAFA#X0, R5F104JDAFA#X0, R5F104JEAFA#X0, R5F104JFAFA#X0,
R5F104JGAFA#X0, R5F104JHAFA#X0, R5F104JJAFA#X0
D R5F104JCDFA#V0, R5F104JDDFA#V0, R5F104JEDFA#V0, R5F104JFDFA#V0,
R5F104JGDFA#V0, R5F104JHDFA#V0, R5F104JJDFA#V0
R5F104JCDFA#X0, R5F104JDDFA#X0, R5F104JEDFA#X0, R5F104JFDFA#X0,
R5F104JGDFA#X0, R5F104JHDFA#X0, R5F104JJDFA#X0
G R5F104JCGFA#V0, R5F104JDGFA#V0, R5F104JEGFA#V0, R5F104JFGFA#V0,
R5F104JGGFA#V0, R5F104JHGFA#V0, R5F104JJGFA#V0
R5F104JCGFA#X0, R5F104JDGFA#X0, R5F104JEGFA#X0, R5F104JFGFA#X0,
R5F104JGGFA#X0, R5F104JHGFA#X0, R5F104JJGFA#X0
Note
Caution
For the fields of application, refer to Figure 1 - 1 Part Number, Memory Size, and Package of RL78/G14.
The ordering part numbers represent the numbers at the time of publication. For the latest ordering part
numbers, refer to the target product page of the Renesas Electronics website.
R01DS0053EJ0320 Rev. 3.20
Jan 05, 2015
Page 6 of 208

6 Page









R5F104ED pdf, datenblatt
RL78/G14
1.3.3 36-pin products
• 36-pin plastic WFLGA (4 × 4 mm, 0.5 mm pitch)
Top View
RL78/G14
(Top View)
A BCDE F
6
5
4
3
2
1
Bottom View
F EDCB A
1. OUTLINE
INDEX MARK
A
P60/SCLA0
6
VDD
B
C
P121/X1
DE
P122/X2/EXCLK P137/INTP0
F
P40/TOOL0
6
P62/SSI00
5
P61/SDAA0
VSS
REGC
RESET
P72/SO21
4
P71/SI21/
SDA21
P14/RxD2/SI20/ P31/TI03/TO03/ P00/TI00/TxD1/
SDA20/TRDIOD0/ INTP4/PCLBUZ0/ TRGCLKA/
(SCLA0)
(TRJIO0)
(TRJO0)
P50/INTP1/
P70/SCK21/
SI00/RxD0/
SCL21
3 TOOLRxD/
SDA00/TRGIOA/
(TRJO0)
P15/PCLBUZ1/
SCK20/SCL20/
TRDIOB0/
(SDAA0)
P22/ANI2/
ANO0 Note
P20/ANI0/
AVREFP
P30/INTP3/
SCK00/SCL00/
2 TRJO0
P16/TI01/TO01/
INTP5/TRDIOC0/
IVREF0 Note/
(RXD0)
P12/SO11/
TRDIOB1/
IVREF1 Note
P11/SI11/
SDA11/
TRDIOC1
P24/ANI4
P51/INTP2/
SO00/TxD0/
1 TOOLTxD/
TRGIOB
P17/TI02/TO02/
TRDIOA0/
TRDCLK/
IVCMP0 Note/
(TXD0)
P13/TxD2/
SO20/TRDIOA1/
IVCMP1 Note
P10/SCK11/
SCL11/
TRDIOD1
P147/ANI18/
VCOUT1 Note
AB C DE
Note
Mounted on the 96 KB or more code flash memory products.
P120/ANI19/
VCOUT0 Note
P01/TO00/
RxD1/TRGCLKB/
TRJIO0
P21/ANI1/
AVREFM
P23/ANI3/
ANO1 Note
P25/ANI5
F
5
4
3
2
1
Caution Connect the REGC pin to VSS pin via a capacitor (0.47 to 1 F).
Remark 1. For pin identification, see 1.4 Pin Identification.
Remark 2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register 0, 1
(PIOR0, 1).
R01DS0053EJ0320 Rev. 3.20
Jan 05, 2015
Page 12 of 208

12 Page





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