Datenblatt-pdf.com


ADF4355-3 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADF4355-3
Beschreibung Microwave Wideband Synthesizer
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADF4355-3 Datasheet, Funktion
Data Sheet
Microwave Wideband Synthesizer
with Integrated VCO
ADF4355-3
FEATURES
GENERAL DESCRIPTION
RF output frequency range: 51.5625 MHz to 6600 MHz
The ADF4355-3 allows the implementation of fractional-N or
Fractional-N synthesizer and integer-N synthesizer
integer-N phase-locked loop (PLL) frequency synthesizers when
High resolution 38-bit modulus
used with an external loop filter and an external reference
Low phase noise, voltage controlled oscillator (VCO)
frequency. A series of frequency dividers at the output provide
Programmable divide by 1, 2, 4, 8, 16, 32, or 64 output
operation from 51.5625 MHz to 6600 MHz.
All power supplies: 3.3 V
Logic compatibility: 1.8 V
Programmable dual modulus prescaler of 4/5 or 8/9
Programmable output power level
RF output mute function
3-wire serial interface
Analog and digital lock detect
The ADF4355-3 has an integrated VCO with a fundamental
output frequency ranging from 3300 MHz to 6600 MHz. In
addition, the VCO frequency is connected to divide by 1, 2, 4, 8,
16, 32, or 64 circuits that allow the user to generate RF output
frequencies as low as 51.5625 MHz. For applications that require
isolation, the RF output stage can be muted. The mute function
is both pin- and software-controllable.
APPLICATIONS
Control of all on-chip registers is through a simple 3-wire interface.
Wireless infrastructure (W-CDMA, TD-SCDMA,
The ADF4355-3 operates with analog, digital, charge pump, and
WiMAX, GSM, PCS, DCS, DECT)
VCO power supplies ranging from 3.1515 V to 3.4485 V. The
Point to point/point to multipoint microwave links
ADF4355-3 also contains hardware and software power-down
Satellites/VSATs
modes.
Test equipment/instrumentation
Clock generation
FUNCTIONAL BLOCK DIAGRAM
CE
AVDD
DVDD
VP
RSET VVCO
VRF
AVDD
REF IN A
REFIN B
CLK
DATA
LE
×2
DOUBLER
10-BIT R
COUNTER
÷2
DIVIDER
DATA REGISTER
FUNCTION
LATCH
INTEGER
REG
FRACTION MODULUS
REG
REG
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
LOCK
DETECT
MULTIPLEXER
CHARGE
PUMP
PHASE
COMPARATOR
VCO
CORE
÷116/2//342//864
OUTPUT
STAGE
MUXOUT
CREG1
CREG2
CPOUT
VTUNE
VREF
VBIAS
VREGVCO
RFOUTA+
RFOUTA–
N COUNTER
MULTIPLEXER
OUTPUT
STAGE
PDBRF
RFOUTB+
RFOUTB–
ADF4355-3
AGND
CPGND
AGNDRF
Figure 1.
SDGND AGNDVCO
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2015–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






ADF4355-3 Datasheet, Funktion
ADF4355-3
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter1
VRF, DVDD, AVDD to GND
AVDD to DVDD
VP, VVCO, VREGVCO to GND
CPOUT to GND1
Digital Input/Output Voltage to GND
Analog Input/Output Voltage to GND
REFINA, REFINB to GND
REFINA to REFINB
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
θJA, Thermal Impedance Pad Soldered
to GND
Reflow Soldering
Peak Temperature
Time at Peak Temperature
Electrostatic Discharge (ESD)
Charged Device Model
Human Body Model
Rating
−0.3 V to +3.6 V
−0.3 V to +0.3 V
−0.3 V to +3.6 V
−0.3 V to VP + 0.3 V
−0.3 V to DVDD + 0.3 V
−0.3 V to AVDD + 0.3 V
−0.3 V to AVDD + 0.3 V
±2.1 V
−40°C to +105°C
−65°C to +125°C
150°C
27.3°C/W
260°C
40 sec
500 V
2500 V
1 GND = AGND = SDGND = AGNDRF = AGNDVCO = CPGND = 0 V.
Data Sheet
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
The ADF4355-3 is a high performance RF integrated circuit
with an ESD rating of 2500 V and is ESD sensitive. Take proper
precautions for handling and assembly.
TRANSISTOR COUNT
The transistor count for the ADF4355-3 is 103,665 (CMOS) and
3214 (bipolar).
ESD CAUTION
Rev. A | Page 6 of 34

6 Page









ADF4355-3 pdf, datenblatt
ADF4355-3
Data Sheet
THEORY OF OPERATION
REFERENCE INPUT SECTION
Figure 18 shows the reference input section of the ADF4355-3.
The reference input can accept both single-ended and differential
signals. Use the reference mode bit (Register 4, Bit DB9) to select
the signal. To use a differential signal on the reference input, program
this bit high. In this case, SW1 and SW2 are open, SW3 and SW4
are closed, and the current source that drives the differential pair
of transistors switches on. The differential signal is buffered, and
it is provided to an emitter coupled logic (ECL) to a CMOS
converter. When a single-ended signal is the reference, connect
the reference signal to REFINA and program Bit DB9 in Register 4
to 0. In this case, SW1 and SW2 are closed, SW3 and SW4 are
open, and the current source that drives the differential pair of
transistors switches off. Single-ended mode results in lower integer
boundary spurs.
REFERENCE
INPUT MODE
REFINA
SW1
85k
SW2
BUFFER
SW3
TO
R COUNTER
MULTIPLEXER
AVDD
ECL TO CMOS
BUFFER
REFINB
2.5kΩ
2.5kΩ
BIAS
SW4
GENERATOR
Figure 18. Reference Input Stage
RF N DIVIDER
The RF N divider allows a division ratio in the PLL feedback path.
Determine the division ratio by the INT, FRAC1, FRAC2, and
MOD2 values that this divider comprises.
FROM
VCO OUTPUT/
OUTPUT DIVIDERS
RF N COUNTER
N = INT +
N COUNTER
FRAC1 +
FRAC2
MOD2
MOD1
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
TO
PFD
INT
REG
FRAC1
REG
FRAC2
VALUE
MOD2
VALUE
Figure 19. RF N Divider
INT, FRACx, MODx, and R Counter Relationship
The INT, FRAC1, FRAC2, MOD1, and MOD2 values, in
conjunction with the R counter, make it possible to generate
output frequencies that are spaced by fractions of the PFD
frequency (fPFD). For more information, see the RF Synthesizer—
A Worked Example section.
Calculate the RF VCO frequency (VCOOUT) by
VCOOUT = fPFD × N
(1)
where:
VCOOUT is the output frequency of the VCO (without using the
output divider).
fPFD is the frequency of the phase frequency detector.
N is the desired value of the feedback counter, N.
Calculate fPFD by
fPFD = REFIN × ((1 + D)/(R × (1 + T)))
(2)
where:
REFIN is the reference input frequency.
D is the REFIN doubler bit.
R is the preset divide ratio of the binary 10-bit programmable
reference counter (1 to 1023).
T is the REFIN divide by 2 bit (0 or 1).
N comprises
N
=
INT
+
FRAC1 +
FRAC2
MOD2
MOD1
(3)
where:
INT is the 16-bit integer value (23 to 32,767 for the 4/5
prescaler, and 75 to 65,535 for the 8/9 prescaler).
FRAC1 is the numerator of the primary modulus (0 to 16,777,215).
FRAC2 is the numerator of the 14-bit auxiliary modulus
(0 to 16,383).
MOD2 is the programmable, 14-bit auxiliary fractional
modulus (2 to 16,383).
MOD1 is a 24-bit primary modulus with a fixed value of 224 =
16,777,216.
Equation 3 results in a very fine frequency resolution with no resid-
ual frequency error. Apply this formula using the following steps:
1. Calculate N by dividing VCOOUT/fPFD. The integer value of
this number forms INT.
2. Subtract the INT value from the full N value.
3. Multiply the remainder by 224. The integer value of this
number forms FRAC1.
4. Calculate the MOD2 based on the channel spacing (fCHSP) by
MOD2 = fPFD /GCD(fPFD, fCHSP)
(4)
where:
fCHSP is the desired channel spacing.
GCD(fPFD, fCHSP) is the greatest common divider of the PFD
frequency and the channel spacing frequency.
Rev. A | Page 12 of 34

12 Page





SeitenGesamt 30 Seiten
PDF Download[ ADF4355-3 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
ADF4355-2Microwave Wideband SynthesizerAnalog Devices
Analog Devices
ADF4355-3Microwave Wideband SynthesizerAnalog Devices
Analog Devices

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche