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PDF ADA8282 Data sheet ( Hoja de datos )
| Número de pieza | ADA8282 | |
| Descripción | 4-Channel LNA and PGA | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
FEATURES
4 channels of low noise amplifiers (LNAs) followed by
programmable gain amplifiers (PGAs)
Minimum −3 dB bandwidth of 5 MHz
Typical –3 dB bandwidth of 42.3 MHz
Typical slew rate of 28 V/µs
Differential input and output
Gain of 18 dB to 36 dB in 6 dB steps
Selectable low noise and low power modes
Input referred noise of 4.5 nV/√Hz at 18.3 mW per channel
Input referred noise of 3.8 nV/√Hz at 26.5 mW per channel
Input referred noise of 3.6 nV/√Hz at 34.8 mW per channel
Input referred noise of 3.4 nV/√Hz at 54.8 mW per channel
Channel to channel gain matching of ±0.25 dB
Absolute gain error of ±0.5 dB
SPI programmable
Power-down mode (SPI selectable)
3.1 V p-p differential output swing when using a 3.3 V supply
32-lead, 5 mm × 5 mm LFCSP package
Specified from −40°C to +125°C
Qualified for automotive applications
APPLICATIONS
Automotive radar
Adaptive cruise control
Collision avoidance
Blind spot detection
Self parking
Electronic bumpers
GENERAL DESCRIPTION
The ADA8282 is designed for applications that require low cost,
low power, compact size, and flexibility. The ADA8282 has four
parallel channels, eachincluding anLNA and a PGA. The LNA
and PGA combine to form a signal chainthat features a gain range
of 18 dB to 36 dB in 6 dB increments with a guaranteed
minimum bandwidth of 5 MHz.
Using the highest power settings, the combinedinput referred
voltage noise of the combined LNA and PGA channel is
3.4 nV/√Hz at maximum gain.
Radar Receive Path AFE:
4-Channel LNA and PGA
ADA8282
FUNCTIONAL BLOCK DIAGRAM
+INA
–INA
ADA8282
3nV√Hz LNA
PGA
+24dB –6dB TO +12dB
+INB
–INB
3nV√Hz LNA
PGA
+24dB –6dB TO +12dB
+INC
–INC
3nV√Hz LNA
PGA
+24dB –6dB TO +12dB
+IND
–IND
3nV√Hz LNA
PGA
+24dB –6dB TO +12dB
POWER GAIN
MODE SELECT
+OUTA
–OUTA
+OUTB
–OUTB
+OUTC
–OUTC
+OUTD
–OUTD
SPI
CS SCLK SDI SDO VIO AVDD RESET
Figure 1.
The ADA8282 can be configured in four power modes that
trade off power andnoise performance to optimize the overall
performance according to the end application.
Fabricated in an advanced complementary metal-oxide
semiconductor (CMOS) process, the ADA8282 is available in a
5 mm × 5 mm, RoHS-compliant, 32-leadLFCSP. It is specified
over the automotive temperature range of −40°C to +125°C.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility isassumedby AnalogDevicesforits use,norforany infringements of patents orother
rights of thirdparties thatmay resultfrom its use.Specificationssubjecttochangewithoutnotice.No
license is granted by implicationor otherwise underany patentorpatentrights of AnalogDevices .
Trademarks andregistered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Electrical
AVDD to EPAD
+INx, −INx, SCLK, SDI, SDO, CS, VIO, RESET,
−OUTx, +OUTx to EPAD
ESD Ratings
Human Body Model (HBM)
Charged Device Model (CDM)
Environmental
Operating Temperature Range (Ambient)
Storage Temperature Range (Ambient)
Maximum Junction Temperature
Lead Temperature (Soldering, 10 sec)
Rating
−0.3 V to +3.9 V
−0.3V to AVDD +
0.3 V
±4000 V
±2000 V
−40°C to +125°C
−65°C to +150°C
150°C
300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ADA8282
THERMAL RESISTANCE
θJA is specified for the worst case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
32-Lead, 5 mm × 5 mm LFCSP
θJA
33.51
θJC Unit
4.1 °C/W
ESD CAUTION
Rev. 0 | Page 5 of 21
5 Page 
Data Sheet
ADA8282
THEORY OF OPERATION
RADAR RECEIVE PATH AFE
The primary application for the ADA8282 is a high speed ramp,
frequency modulated, continuous wave radar (HSR-FMCW radar).
Figure 25 shows a simplified block diagram of an HSR-FMCW
radar system. The signal chain requires multiple channels, each
including an LNA and a PGA. The ADA8282 provides these key
components in a single 5 mm × 5 mm LFCSP.
The performance of each component is designed to meet the
demands of an HSR-FMCW radar system. Some examples of
these performance metrics are the LNA noise, PGA gain range,
and signal chain bandwidth and power. The ADA8282 also has
adjustable power modes to adjust the power and performance
level to accommodate a wide variety of applications.
The ADA8282 is programmable via the SPI. Channel gain,
power mode, and offset voltage can be adjusted using the SPI port.
DEFAULT SPI SETTINGS
When initially powered, the ADA8282 defaults to a setting of
0x00 in Register 0x17, which disables all channels. The device is
enabled by writing 0x0F to Register 0x17.
INPUT IMPEDANCE
The input impedance to the ADA8282 is set by an internal 785 Ω
resistance at each input, biased to midsupply by an internal voltage
buffer. Both the positive and negative inputs are biased with the
same network, creating a differential input impedance of 1.57 kΩ.
The input to the ADA8282 is typically ac-coupled. The ac
coupling capacitors operate with the input impedance of the
ADA8282 to create a high-pass filter with a pole at 1/(2π2RC),
where R = 785 Ω with a typical tolerance of ±15%.
POWER MODES
The ADA8282 has four power modes that can be controlled
through Register 0x14 (BIAS_SEL). The power modes allow a
user to adjust the power and performance tradeoffs to suit the end
application. Use the low power mode when power savings are in
demand, and use the high power mode in applications that
require increased bandwidth and low noise.
Table 6 shows the power performance trade-offs of the various
SPI settings.
Table 6. Power Mode Trade-Offs
Power per Input Referred
Mode Channel Noise at 2 MHz
Setting (mW)
(nV/√Hz)
b’00 18.3
4.5
b’01 26.5
3.8
b’10 34.8
3.6
b’11 54.8
3.4
Typical Bandwidth
(MHz), Gain = 36 dB
20.5
34.2
42.3
52.3
TRANSMIT SIGNAL GENERATION
REF.
OSCILLATOR
CHIRP RAMP
GENERATOR
PA
VCO
ADA8282
LNA PGA
DSP
12-BIT
ADC
LNA PGA
12-BIT
ADC
LNA PGA
12-BIT
ADC
ANTENNA
Figure 25. Typical Signal Chain Overview
Rev. 0 | Page 11 of 21
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet ADA8282.PDF ] | |
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