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R5F2LA87ANFA Schematic ( PDF Datasheet ) - Renesas

Teilenummer R5F2LA87ANFA
Beschreibung 16-BIT SINGLE-CHIP MICROCOMPUTER
Hersteller Renesas
Logo Renesas Logo 




Gesamt 30 Seiten
R5F2LA87ANFA Datasheet, Funktion
Datasheet
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group
RENESAS MCU
R01DS0011EJ0100
Rev.1.00
Dec 21, 2010
1. Overview
1.1 Features
The R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, and R8C/LA8A Group of single-chip MCUs
incorporate the R8C CPU core, which implements a powerful instruction set for a high level of efficiency and
supports a 1 Mbyte address space, allowing execution of instructions at high speed. In addition, the CPU core
integrates a multiplier for high-speed operation processing.
Power consumption is low, and the supported operating modes allow additional power control. These MCUs are
designed to maximize EMI/EMS performance.
Integration of many peripheral functions, including multifunction timer and serial interface, helps reduce the
number of system components.
The R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, and R8C/LA8A Group have data flash (1 KB × 2
blocks).
1.1.1 Applications
Household appliances, office equipment, audio equipment, consumer products, etc.
www.DataSheet4U.com
R01DS0011EJ0100 Rev.1.00
Dec 21, 2010
Page 1 of 102






R5F2LA87ANFA Datasheet, Funktion
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group
1. Overview
Table 1.7 Specifications (2)
Item Function
Specification
Timer
Timer RB0, Timer RB1 8 bits × 2 (with 8-bit prescaler)
Timer mode (period timer), programmable waveform generation mode
(PWM output), programmable one-shot generation mode, programmable wait
one-shot generation mode
Timer RC
16 bits × 1 (with 4 capture/compare registers)
Timer mode (input capture function, output compare function),
PWM mode (output: 3 pins), PWM2 mode (PWM output: 1 pin)
Timer RH
Real-time clock mode (counting of seconds, minutes, hours, day of the week,
date, month, year), output compare mode
Timer RJ0
Timer RJ1
Timer RJ2
R8C/LA3A
Group
R8C/LA5A
Group
Timer RJ0,
Timer RJ1
16 bits × 2
Timer mode (period timer), pulse output mode
(output level inverted every period), event
counter mode, pulse width measurement mode,
pulse period measurement mode
R8C/LA6A
Group
R8C/LA8A Timer RJ0,
16 bits × 3
Group
Timer RJ1,
Timer RJ2
Serial UART0
Interface
1 channel
Clock synchronous serial I/O/UART
UART2
1 channel
Clock synchronous serial I/O/UART, I2C mode (I2C-bus), multiprocessor
Synchronous Serial
Communication Unit (SSU)
communication function
1 (shared with I2C-bus)
I2C bus
1 (shared with SSU)
A/D Converter
R8C/LA3A 10-bit resolution × 5 channels, including sample and hold function, with sweep
Group
mode, temperature sensor included (measurement temperature range:
20 to 85 °C (N version)/ 40 to 85 °C (D version))
R8C/LA5A
Group
R8C/LA6A
10-bit resolution × 7 channels, including sample and hold function, with sweep
mode, temperature sensor included (measurement temperature range:
20 to 85 °C (N version)/ 40 to 85 °C (D version))
10-bit resolution × 8 channels, including sample and hold function, with sweep
Group
mode, temperature sensor included (measurement temperature range:
20 to 85 °C (N version)/ 40 to 85 °C (D version))
R8C/LA8A 10-bit resolution × 12 channels, including sample and hold function, with sweep
Group
mode, temperature sensor included (measurement temperature range:
20 to 85 °C (N version)/ 40 to 85 °C (D version))
Comparator B
R8C/LA3A 1 circuit (comparator B1)
Group
R8C/LA5A 2 circuits (comparator B1, comparator B3)
Group
R8C/LA6A
Group
R8C/LA8A
Group
www.DataSheet4U.com
R01DS0011EJ0100 Rev.1.00
Dec 21, 2010
Page 6 of 102

6 Page









R5F2LA87ANFA pdf, datenblatt
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group
1. Overview
1.3 Block Diagrams
Figure 1.5 shows a Block Diagram of R8C/LA3A Group. Figure 1.6 shows a Block Diagram of R8C/LA5A Group.
Figure 1.7 shows a Block Diagram of R8C/LA6A Group. Figure 1.8 shows a Block Diagram of R8C/LA8A Group.
I/O ports
Peripheral functions
Timers
Timer RB (8 bits × 2)
Timer RC (16 bits × 1)
Timer RH
Timer RJ (16 bits × 2)
Watchdog timer
(14 bits)
A/D converter
(10 bits × 5 channels)
Temperature Sensor
Voltage detection circuit
8
Port P2
7
Port P5
UART or
clock synchronous serial I/O
(8 bits × 1)
I2C bus or SSU
(8 bits × 1)
System clock generation
circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
XCIN-XCOUT
Low-speed on-chip oscillator
for watchdog timer
Comparator B 1 ch
LCD drive control circuit
Common output: Max. 4 pins
Segment output: Max. 11 pins
R8C CPU core
R0H
R1H
R2
R3
A0
A1
FB
R0L
R1L
SB
USP
ISP
INTB
PC
FLG
Memory
ROM (1)
RAM (2)
Multiplier
1
8
2
Figure 1.5 Block Diagram of R8C/LA3A Group
www.DataSheet4U.com
Notes:
1. ROM capacity varies with MCU type.
2. RAM capacity varies with MCU type.
R01DS0011EJ0100 Rev.1.00
Dec 21, 2010
Page 12 of 102

12 Page





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