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PDF RF3183 Data sheet ( Hoja de datos )
| Número de pieza | RF3183 | |
| Descripción | QUAD-BAND/GSM850/EGSM900/DCS/PCS/POWER AMPLIFIER MODULE | |
| Fabricantes | RF Micro Devices | |
| Logotipo |  |
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RF3183
QUAD-BAND/GSM850/EGSM900
/DCS/PCS/POWER AMPLIFIER MODULE
Package Style: Module (5mmx5mmx1mm)
DCS RFIN 1
10 DCS RFOUT
Features
Typical GMSK Efficiency
GSM850/900 48/53%
DCS/PCS 50/53%
Auto VBATT Tracking Circuit avoids
Switching Transients at Low
Supply Voltage
Integrated Power Flattening
Circuit Reduces Power and
Current into Mismatch
Integrated VRAMP Rejection Filter
Eliminates External Components
Applications
Quad-Band GSM Handsets
GSM Transmitter Line-ups
Portable Battery-Powered
Equipment
GSM850/EGSM900/DCS/
PCS Products
GPRS Class 12 Compatible
Products
Mobile EDGE/GPRS Data
Products
BAND SEL 2
TX EN 3
VBATT 4
GND 5
VRAMP 6
GSM RFIN 7
GND 8
Integrated Power
Control
9 GSM RFOUT
Functional Block Diagram
Product Description
The RF3183 is a high power amplifier module with integrated power control. The input and out-
put terminals are internally matched to 50. The amplifier devices are manufactured on an
advanced Gallium Arsenide Heterojunction Bipolar Transistor (GaAs HBT) process. The module
is designed to be the final amplification stage in a dual-mode GSM/EDGE mobile transmit
lineup operating in the 824MHz to 915MHz (low) and 1710MHz to 1910MHz (high) bands
(such as a cellular handset). Band selection is controlled by an input on the module which
selects either the low or high band. The device is packaged on a 5mmx5mm laminate module
with a protective plastic over-mold. The RF3183 features RFMD’s latest integrated power flat-
tening circuit, which significantly reduces current and power variation into load mismatch. The
RF3183 provides excellent ESD protection at all the pins. The RF3183 also provides integrated
VRAMP rejection filter which improves noise performance and transient spectrum.
Ordering Information
RF3183RF3183Quad-Band/GSM850/EGSM900 /DCS/PCS/Power Amplifier Module
RF3183PCBA-41X
Quad-Band/GSM850/EGSM900 /DCS/PCS/Power Amplifier
Module
Power Amplifier Module, 5 Piece Sample Pack
Fully Assembled Evaluation Board
DS100412
Optimum Technology Matching® Applied
GaAs HBT
GaAs MESFET
SiGe BiCMOS
Si BiCMOS
GaAs pHEMT
Si CMOS
GaN HEMT
RF MEMS
InGaP HBT
SiGe HBT
Si BJT
LDMOS
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trade-
mark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or [email protected].
1 of 20
1 page  
RF3183
Parameter
Specification
Min. Typ. Max.
DCS 1800MHz Band
GMSK Mode
Operating Frequency Range
Input Power Range, PIN
Maximum Output Power 1
Maximum Output Power 2
Total Efficiency (PAE)
Output Noise Power
1710
1785
-2 +1 +4
32.0
33
30 31
43 50
-81 -77
Forward Isolation 1
-32
Forward Isolation 2
2f0 Harmonics
3f0 Harmonics
All Other Non-harmonic Spurious
Input VSWR
Output Load VSWR Stability
-10
-20 -10
-25 -15
-36
2:1 3:1
-36
Output Load VSWR Ruggedness
No damage or permanent degradation to
device
Note: VRAMP,MAX=2.2V, VRAMP,MIN =0.25V, Rated POUT =32.0dBm
Unit
MHz
dBm
dBm
dBm
%
dBm
dBm
dBm
dBm
dBm
dBm
dBm
Condition
Nominal test conditions unless otherwise
stated. Temp=25 °C, VBATT=3.6V,
Freq=1710MHz to 1785MHz, 25% Duty Cycle,
Pulse Width=1154s, PIN=-2dBm,
BAND_SEL=“High”, TX_EN=“High”,
VRAMP = VRAMP,MAX
Temp=25°C, VBATT=3.6V
Temp=+85oC, VBATT=3.0V
PIN = +1 dBm
1805MHz to 1880MHz, f0=1785MHz,
POUT<Rated POUT, RBW=100KHz
TX_EN=0V, VRAMP=VRAMP,MIN,
PIN = +4 dBm
VRAMP=VRAMP,MIN, PIN=+4dBm
POUT<Rated POUT
POUT<Rated POUT
Over PIN range, POUT<Rated POUT
Load VSWR=5:1 All phase angles, Set VRAMP
where POUT<Rated POUT into 50 load, then
load switched to VSWR=5:1, Full PIN Range,
RBW=3MHz, no oscillations
Load VSWR=10:1 All phase angles Set VRAMP
where POUT<Rated POUT into 50 load, then
load switched to VSWR=10:1
DS100412
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or [email protected].
5 of 20
5 Page 
RF3183
POUTdBm
=
10log ---2-------V----C----C----–-----V----S---A---T-----2- (Eq. 1)
8 R1 10–3
RF3183 power is ramped up and down through the VRAMP control voltage which in turn controls the collector voltage of the
amplifier stages. The RF signal applied at the RFIN pin must be a constant amplitude signal and should be high enough to sat-
urate the amplifier in the GSM mode. The input power (PIN) range is indicated in the specifications. Power levels below this
range will result in reduced maximum output power and the potential for more variation of output power over extreme condi-
tions. Higher input power is unnecessary and will require more current in the circuitry driving the power amplifier and will
increase the minimum output power of the RF3183.
The saturation detector circuit monitors the VBATT and VCC voltages and adjusts the power control loop to prevent the series-
pass FET regulator from entering saturation. If the VCC regulator were to saturate, the response time would increase dramati-
cally. This is undesirable because the VCC regulator must accurately follow the burst ramp up or ramp down applied to the
VRAMP pin, or the transient spectrum will degrade.
Power Ramping and Timing
The RF3183 should be powered on according to the Power-On Sequence provided in the datasheet. The power on sequence is
designed to prevent operation of the amplifier under conditions that could cause damage to the device or erratic operation.
In the Power-On Sequence, there are some set-up times associated with the control signals of the RF3183. The most important
of these is the settling time between TXEN going high and when VRAMP can begin to increase. This time is often referred to as
the “pedestal” and is required so that the internal power control loop and bias circuitry can settle after being turned on. The
RF3183 requires at least 1.5µs or two quarter bit times for proper settling of the power control loop..
Figure 5. ETSI Time Mask for a Single GSM Time Slot
The VRAMP waveform used with the RF3183 must be created such that the output power falls into this power versus time mask.
The ability to ramp the RF output power to meet ETSI switching transient and time mask requirements partially depends upon
the predictability of output power versus VRAMP response of the power amplifier. The PowerStar® control in the RF3183 is very
capable of meeting switching transient requirements with the proper raised cosine waveform applied to the VRAMP input. The
ramping waveform on VRAMP must not start until after TX_EN is asserted. A ramp of about 12us is required to control switching
transients at high power levels.
DS100412
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or [email protected].
11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet RF3183.PDF ] | |
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