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PDF CAP1188 Data sheet ( Hoja de datos )

Número de pieza CAP1188
Descripción 8 Channel Capacitive Touch Sensor
Fabricantes Microchip 
Logotipo Microchip Logotipo



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CAP1188
8 Channel Capacitive Touch Sensor with 8 LED Drivers
General Description
The CAP1188, which incorporates RightTouch® tech-
nology, is a multiple channel Capacitive Touch sensor
with multiple power LED drivers. It contains eight (8)
individual capacitive touch sensor inputs with program-
mable sensitivity for use in touch sensor applications.
Each sensor input automatically recalibrates to com-
pensate for gradual environmental changes.
The CAP1188 also contains eight (8) LED drivers that
offer full-on / off, variable rate blinking, dimness con-
trols, and breathing. Each of the LED drivers may be
linked to one of the sensor inputs to be actuated when
a touch is detected. As well, each LED driver may be
individually controlled via a host controller.
The CAP1188 includes Multiple Pattern Touch recogni-
tion that allows the user to select a specific set of but-
tons to be touched simultaneously. If this pattern is
detected, then a status bit is set and an interrupt gen-
erated.
Additionally, the CAP1188 includes circuitry and sup-
port for enhanced sensor proximity detection.
The CAP1188 offers multiple power states operating at
low quiescent currents. In the Standby state of opera-
tion, one or more capacitive touch sensor inputs are
active and all LEDs may be used. If a touch is detected,
it will wake the system using the WAKE/SPI_MOSI pin.
Deep Sleep is the lowest power state available, draw-
ing 5uA (typical) of current. In this state, no sensor
inputs are active. Driving the WAKE/SPI_MOSI pin or
communications will wake the device.
Applications
• Desktop and Notebook PCs
• LCD Monitors
• Consumer Electronics
• Appliances
Features
• Eight (8) Capacitive Touch Sensor Inputs
- Programmable sensitivity
- Automatic recalibration
- Individual thresholds for each button
• Proximity Detection
• Multiple Button Pattern Detection
• Calibrates for Parasitic Capacitance
• Analog Filtering for System Noise Sources
• Press and Hold feature for Volume-like Applica-
tions
• Multiple Communication Interfaces
- SMBus / I2C compliant interface
- SPI communications
- Pin selectable communications protocol and
multiple slave addresses (SMBus / I2C only)
• Low Power Operation
- 5uA quiescent current in Deep Sleep
- 50uA quiescent current in Standby (1 sensor
input monitored)
- Samples one or more channels in Standby
• Eight (8) LED Driver Outputs
- Open Drain or Push-Pull
- Programmable blink, breathe, and dimness
controls
- Can be linked to Capacitive Touch Sensor
inputs
• Dedicated Wake output flags touches in low
power state
• System RESET pin
• Available in 24-pin 4mm x 4mm RoHS compliant
QFN package
2015 Microchip Technology Inc.
DS00001620C-page 1

1 page




CAP1188 pdf
2.0 PIN DESCRIPTION
FIGURE 2-1:
CAP1188 Pin Diagram (24-Pin QFN)
CAP1188
TABLE 2-1: PIN DESCRIPTION FOR CAP1188
Pin #
Pin Name
Pin Function
1 SPI_CS#
Active low chip-select for SPI bus
WAKE - Active high wake / interrupt output -
Standby power state - requires pull-down resistor
2
WAKE / SPI_- WAKE - Active high wake input Deep Sleep power
MOSI
state - requires pull-down resistor
SPI_MOSI - SPI Master-Out-Slave-In port when
used in normal mode
Pin Type
DI (5V)
DO
DI
DI (5V)
Unused
Connection
Connect to
Ground
Pull-down Resis-
tor
Connect to
Ground
2015 Microchip Technology Inc.
DS00001620C-page 5

5 Page





CAP1188 arduino
CAP1188
TABLE 3-2: ELECTRICAL SPECIFICATIONS (CONTINUED)
VDD = 3V to 3.6V, TA = 0°C to 85°C, all typical values at TA = 27°C unless otherwise noted.
Characteristic
Symbol
Min
Typ Max Unit
Conditions
Input High Voltage
Input Low Voltage
Leakage Current
VIH
VIL
ILEAK
2.0
V
0.8 V
powered or unpowered
±5 uA
TA < 85°C
pull-up voltage < 3.6V if unpowered
RESET Pin Release
to conversion ready
tRESET
Input Capacitance
Clock Frequency
Spike Suppression
Bus Free Time Stop to
Start
Start Setup Time
Start Hold Time
Stop Setup Time
Data Hold Time
Data Hold Time
Data Setup Time
Clock Low Period
Clock High Period
Clock / Data Fall Time
Clock / Data Rise
Time
CIN
fSMB
tSP
tBUF
tSU:STA
tHD:STA
tSU:STO
tHD:DAT
tHD:DAT
tSU:DAT
tLOW
tHIGH
tFALL
tRISE
170 200 ms
SMBus Timing
5 pF
10 400 kHz
50 ns
1.3 us
0.6 us
0.6 us
0.6 us
0 us When transmitting to the master
0.3 us When receiving from the master
0.6 us
1.3 us
0.6 us
300 ns
Min = 20+0.1CLOAD ns
300 ns
Min = 20+0.1CLOAD ns
Capacitive Load
CLOAD
400
SPI Timing
pF
per bus line
Clock Period
Clock Low Period
Clock High Period
Clock Rise / Fall time
Data Output Delay
Data Setup Time
Data Hold Time
SPI_CS# to SPI_CLK
setup time
tP
tLOW
tHIGH
tRISE / tFALL
tD:CLK
tSU:DAT
tHD:DAT
tSU:CS
250
0.4 x tP
0.4 x tP
20
20
0
0.6 x tP
0.6 x tP
0.1 x tP
10
ns
ns
ns
ns
ns
ns
ns
ns
Wake Time
tWAKE
10
20 us SPI_CS# asserted to CLK assert
Note 3-5 The ALERT pin will not glitch high or low at power up if connected to VDD or another voltage.
Note 3-6 The SMCLK and SMDATA pins will not glitch low at power up if connected to VDD or another voltage.
2015 Microchip Technology Inc.
DS00001620C-page 11

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