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ADG5209F Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADG5209F
Beschreibung 8:1/Dual 4:1 Multiplexers
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 27 Seiten
ADG5209F Datasheet, Funktion
Data Sheet
FEATURES
Overvoltage protection up to −55 V and +55 V
Power-off protection up to −55 V and +55 V
Overvoltage detection on source pins
Low charge injection (QINJ): −0.4 pC
Low on capacitance
ADG5208F: 20 pF
ADG5209F: 14 pF
Latch-up immune under any circumstance
Known state without digital inputs present
VSS to VDD analog signal range
±5 V to ±22 V dual supply operation
8 V to 44 V single-supply operation
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
APPLICATIONS
Analog input/output modules
Process control/distributed control systems
Data acquisition
Instrumentation
Avionics
Automatic test equipment
Communication systems
Relay replacement
GENERAL DESCRIPTION
The ADG5208F and ADG5209F are 8:1 and dual 4:1 analog
multiplexers. The ADG5208F switches one of eight inputs to a
common output, and the ADG5209F switches one of four
differential inputs to a common differential output. An EN input
on both devices enables or disables the device. Each channel
conducts equally well in both directions when on, and each
channel has an input signal range that extends to the supplies.
The digital inputs are compatible with 3 V logic inputs over the
full operating supply range.
When no power supplies are present, the channel remains in the off
condition, and the switch inputs are high impedance. Under normal
operating conditions, if the analog input signal levels on any Sx pin
exceed VDD or VSS by a threshold voltage (VT) the channel turns
off and the drain pin is pulled to the supply voltage that was
exceeded. Input signal levels of up to −55 V or +55 V relative to
ground are blocked, in both the powered and unpowered conditions.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
Fault Protection, −0.4 pC QINJ,
8:1/Dual 4:1 Multiplexers
ADG5208F/ADG5209F
FUNCTIONAL BLOCK DIAGRAMS
ADG5208F
S1
D
S8
1-OF-8
DECODER
A0 A1 A2 EN
Figure 1. ADG5208F Functional Block Diagram
ADG5209F
S1A
DA
S4A
S1B
DB
S4B
1-OF-4
DECODER
A0 A1 EN
Figure 2. ADG5209F Functional Block Diagram
The low capacitance and charge injection of these switches make
them ideal solutions for data acquisition and sample-and-hold
applications, where low glitch switching and fast settling times
are required.
PRODUCT HIGHLIGHTS
1. The source pins are protected against voltages greater than
the supply rails, up to −55 V and +55 V.
2. The source pins are protected against voltages between
−55 V and +55 V in an unpowered state.
3. Trench isolation guards against latch-up.
4. Optimized for low charge injection and on capacitance.
5. The ADG5208F/ADG5209F can be operated from a dual
supply of ±5 V up to ±22 V or a single power supply of 8 V
up to 44 V.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






ADG5209F Datasheet, Funktion
ADG5208F/ADG5209F
Data Sheet
Parameter
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tD
Overvoltage Response Time, tRESPONSE
Overvoltage Recovery Time, tRECOVERY
Charge Injection, QINJ
Off Isolation
Channel-to-Channel Crosstalk
Adjacent Channels
Nonadjacent Channels
Total Harmonic Distortion Plus Noise,
THD + N
−3 dB Bandwidth
ADG5208F
ADG5209F
Insertion Loss
CS (Off )
CD (Off )
ADG5208F
ADG5209F
CD (On), CS (On)
ADG5208F
ADG5209F
POWER REQUIREMENTS
−40°C to −40°C to
+25°C +85°C +125°C Unit
190
245 270
185
250 270
95
120 145
140
75
105
820
1100
−0.8
−76
105
1250
285
280
145
90
105
1400
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
dB typ
−75
−88
0.005
dB typ
dB typ
% typ
190 MHz typ
290 MHz typ
10.5 dB typ
4 pF typ
12 pF typ
8 pF typ
19 pF typ
14 pF typ
Normal Mode
IDD
IGND
ISS
Fault Mode
IDD
IGND
ISS
VDD/VSS
1.3
2
0.75
1.25
0.65
0.8
1.6
2.2
0.9
1.6
0.65
1.0
1 Guaranteed by design; not subject to production test.
mA typ
2 mA max
mA typ
1.25 mA max
mA typ
0.85 mA max
mA typ
2.3 mA max
mA typ
1.7 mA max
mA typ
1.1 mA max
±5 V min
±22 V max
Test Conditions/Comments
RL = 1 kΩ, CL = 35 pF
VS = 10 V, see Figure 45
RL = 1 kΩ, CL = 35 pF
VS = 10 V, see Figure 44
RL = 1 kΩ, CL = 35 pF
VS = 10 V, see Figure 44
RL = 1 kΩ, CL = 35 pF
VS = 10 V, see Figure 43
RL = 1 kΩ, CL = 5 pF, see Figure 41
RL = 1 kΩ, CL = 5 pF, see Figure 42
VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 46
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 38
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 40
RL = 10 kΩ, VS = 20 V p-p, f = 20 Hz to 20 kHz,
see Figure 37
RL = 50 Ω, CL = 5 pF, see Figure 39
RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 39
VS = 0 V, f = 1 MHz
VS = 0 V, f = 1 MHz
VS = 0 V, f = 1 MHz
VDD = +22 V; VSS = −22 V; GND = 0 V; digital
inputs = 0 V, 5 V, or VDD
VS = ±55 V
GND = 0 V
GND = 0 V
Rev. 0 | Page 6 of 27

6 Page









ADG5209F pdf, datenblatt
ADG5208F/ADG5209F
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 6.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Sx Pins
Sx to VDD or VSS
VS to VD
D or Dx Pins1
Digital Inputs2
Peak Current, Sx, D, or Dx Pins
Continuous Current, Sx, D, or Dx
Pins
D or Dx Pins, Overvoltage State,
Load Current
Operating Temperature Range
Storage Temperature Range
Junction Temperature
Thermal Impedance, θJA (4-Layer
Board)
Reflow Soldering Peak
Temperature, Pb-Free
Rating
48 V
−0.3 V to +48 V
−48 V to +0.3 V
−55 V to +55 V
80 V
80 V
VSS − 0.7 V to VDD + 0.7 V or
30 mA, whichever occurs first
GND − 0.7 V to 48 V or
30 mA, whichever occurs first
72.5 mA (pulsed at 1 ms,
10% duty cycle maximum)
Data3 + 15%
1 mA
−40°C to +125°C
−65°C to +150°C
150°C
112.6°C/W
As per JEDEC J-STD-020
1 Overvoltages at the D or Dx pins are clamped by internal diodes. Limit the
current to the maximum ratings given.
2 The digital inputs are the EN and Ax pins.
3 See Table 5.
Data Sheet
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Only one absolute maximum rating can be applied at any
one time.
ESD CAUTION
Rev. 0 | Page 12 of 27

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