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PCS3P623Z09A Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer PCS3P623Z09A
Beschreibung Peak EMI Reduction IC
Hersteller ON Semiconductor
Logo ON Semiconductor Logo 




Gesamt 13 Seiten
PCS3P623Z09A Datasheet, Funktion
PCS3P623Z05A,
PCS3P623Z05B,
PCS3P623Z09A,
PCS3P623Z09B
Product Preview
TIMING SAFEt Peak EMI
Reduction IC
Description
PCS3P623Z05/09 is a versatile, 3.3 V Zerodelay buffer designed
to distribute TimingSafe clocks with Peak EMI reduction.
PCS3P623Z05 is an eightpin version, accepts one reference input
and drives out five lowskew TimingSafe clocks. PCS3P623Z09
accepts one reference input and drives out nine lowskew
TimingSafe clocks.
PCS3P623Z05/09 has a DLY_CTRL for adjusting the InputOutput
clock delay, depending upon the value of capacitor connected at this
pin to GND.
PCS3P623Z05/09 operates from a 3.3 V supply and is available in
two different packages, as shown in the ordering information table,
over commercial and Industrial temperature range.
Application
PCS3P623Z05/09 is targeted for use in Displays and memory
interface systems.
Features
Clock Distribution with TimingSafe Peak EMI Reduction
Input Frequency Range: 20 MHz 50 MHz
Multiple Low Skew TimingSafe Outputs:
PCS3P623Z05: 5 Outputs
PCS3P623Z09: 9 Outputs
External InputOutput Delay Control Option
Supply Voltage: 3.3 V ± 0.3 V
Commercial and Industrial Temperature Range
Packaging Information:
ASM3P623Z05: 8 pin SOIC, and TSSOP
ASM3P623Z09: 16 pin SOIC, and TSSOP
True Dropin Solution for Zero Delay Buffer, ASM5P2305A / 09A
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
http://onsemi.com
TSSOP8
T SUFFIX
CASE 948AL
SOIC8
S SUFFIX
CASE 751BD
TSSOP16
T SUFFIX
CASE 948AN
SOIC16
S SUFFIX
CASE 751BG
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
August, 2011 Rev. P2
1
Publication Order Number:
PCS3P623Z05/D






PCS3P623Z09A Datasheet, Funktion
PCS3P623Z05A, PCS3P623Z05B, PCS3P623Z09A, PCS3P623Z09B
Table 7. ELECTRICAL CHARACTERISTICS
Parameter
Description
Test Conditions
VIL Input LOW Voltage (Note 11)
VIH Input HIGH Voltage (Note 11)
IIL Input LOW Current
VIN = 0 V
IIH Input HIGH Current
VIN = VDD
VOL Output LOW Voltage (Note 12)
IOL = 8 mA
VOH Output HIGH Voltage (Note 12)
IOH = 8 mA
IDD Supply Current
Unloaded outputs
Zo Output Impedance
11. CLKIN input has a threshold voltage of VDD/2
12. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Table 8. SWITCHING CHARACTERISTICS
Parameter
Test Conditions
Input Frequency
Output Frequency
30 pF load
Duty Cycle = (t2 / t1) * 100 (Notes 13, 14)
Output Rise Time (Notes 13, 14)
Measured at VDD/2
Measured between 0.8 V and 2.0 V
Output Fall Time (Notes 13, 14)
Measured between 2.0 V and 0.8 V
Outputtooutput skew (Notes 13, 14)
All outputs equally loaded
Delay, CLKIN Rising Edge to
CLKOUT Rising Edge (Note 14)
Measured at VDD/2
DevicetoDevice Skew (Note 14)
Measured at VDD/2 on the CLKOUT
pins of the device
CycletoCycle Jitter (Notes 13, 14)
Loaded outputs
PLL Lock Time (Note 14)
Stable power supply, valid clock
presented on CLKIN pin
13. All parameters specified with 30 pF loaded outputs.
14. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Min
2.0
2.4
Min
20
20
40
Typ Max
0.8
50
100
0.4
27
23
Typ Max
50
50
50 60
2.5
2.5
250
±350
700
±250
1.0
Unit
V
V
mA
mA
V
V
mA
W
Unit
MHz
MHz
%
nS
nS
pS
pS
pS
pS
mS
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6

6 Page









PCS3P623Z09A pdf, datenblatt
PCS3P623Z05A, PCS3P623Z05B, PCS3P623Z09A, PCS3P623Z09B
PACKAGE DIMENSIONS
TSSOP16, 4.4x5
CASE 948AN01
ISSUE O
b
PIN#1
IDENTIFICATION
TOP VIEW
e
D
E1 E
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
L1
θ
MIN
0.05
0.85
0.19
0.13
4.90
6.30
4.30
0.45
NOM
0.65 BSC
1.00 REF
MAX
1.10
0.15
0.95
0.30
0.20
5.10
6.50
4.50
0.75
A2 A θ1
c
A1
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
END VIEW
L1
L
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