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Teilenummer | DAP005 |
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Beschreibung | Advanced transition-mode PFC controller | |
Hersteller | STMicroelectronics | |
Logo | ||
Gesamt 30 Seiten DAP005
Features
Advanced transition-mode PFC controller
Custom Data
■ Transition-mode control of PFC pre-regulators
■ Very precise adjustable output overvoltage
protection
■ Tracking boost function
■ Protection against feedback loop failure
(Latched shutdown)
■ Interface for cascaded converter's PWM
controller
■ Input voltage feedforward (1/V2)
■ AC brownout protection
■ Low (≤ 90µA) start-up current
■ < 5mA quiescent current
■ 1.4% (@ TJ = 25°C) internal reference voltage
■ -600/+800 mA totem pole gate driver with
active pull-down during UVLO
■ SO14 package
SO-14
Applications
PFC pre-regulators for:
■ HI-END AC-DC adapter/charger
■ Desktop PC, server, WEB server
■ IEC61000-3-2 OR JEIDA-MITI compliant
SMPS, in excess of 250W
Table 1. Device summary
Part number
Package
DAP005
SO-14
DAP005TR
SO-14
Packaging
Tube
Tape & Reel
Figure 1.
Block diagram
TBO
VCC
GND
ZCD
AC_OK
TRACKING
BOOST
6 1:1
CURRENT
MIRROR
1:1
BUFFER
3V
14
INV
1
2.5V
-
+
VOLTAGE
from REGULATOR
VFF
COMP
MULT
VFF
23
5
1/V2
Ideal diode
LINE VOLTAGE
MULTIPLIER
FEEDFORWARD
Voltage
references
-+
1.7V
-+
LEADING-EDGE
BLANKING
4
Vbias
(INTERNAL SUPPLY BUS)
INDUCTOR
SATURATION
DETECTION
Q
SAT
VCC
CS
12
11
1.4V
0.7V
UVLO
R1 COMPARATOR
+
R2
-
VREF2
UVLO
ZERO CURRENT
DETECTOR
RQ
S
15 V
Driver
Starter
OFF
STARTER
13
GD
0.2V
0.26V
10
-
0.52V
0.6V
ON/OFF CONTROL
(BROWNOUT DETECTION)
DISABLE
9
PWM_STOP
LATCH
SAT
Vbias
8
FEEDBACK
FAILURE
PROTECTION
PWM_LATCH
PFC_OK
7
2.5V
February 2007
Rev 1
This is a document intended for a specific Customer. It must not be released without first contacting Division marketing.
1/39
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Absolute maximum ratings
2 Absolute maximum ratings
Table 3. Absolute maximum ratings
Symbol
Pin
Parameter
VCC 14 IC supply voltage (Icc = 20mA)
---
2, 4 to 6, 8
to 10
Analog inputs & outputs
--- 1, 3, 7 Max. pin voltage (Ipin = 1 mA)
IPWM_STOP
10 Max. sink current
IZCD 9 Zero current detector max. current
Ptot
TJ
TSTG
Power dissipation @TA = 50°C
Junction temperature operating range
Storage temperature
3 Thermal data
Table 4. Thermal data
Symbol
Parameter
RthJA Maximum thermal resistance junction-ambient
DAP005
Value
self-limited
-0.3 to 8
Self-limited
3
-10 (source)
10 (sink)
0.75
-25 to 150
-55 to 150
Unit
V
V
V
mA
mA
W
°C
°C
Value
120
Unit
°C/W
6/39
6 Page Typical electrical performance
DAP005
Figure 10. Static OVP level vs TJ
VCOMP (pin 2)
2.5
(V)
2.4 Vcc = 12 V
2.3
2.2
2.1
2
-50 0
50 100 150
Tj (°C)
Figure 12. Dynamic OVP current vs TJ
(normalized value)
IOVP120%
Vcc = 12 V
110%
100%
90%
80%
-50
0 50
Tj (°C)
100
Figure 14. Delay-to-output vs TJ
150
tD(H-L) 300
(ns)
250
200
Vcc = 12 V
150
100
50
-50
0 50 100
Tj (°C)
150
Figure 11. Vcs clamp vs TJ
VCSx (pin 4)
(V) 1.5
Vcc = 12 V
1.4 VCOMP = Upper clamp
1.3
1.2
1.1
1
-50 0
50 100 150
Tj (°C)
Figure 13. Current-sense offset vs
mains voltage phase angle
VCSoffset (pin 4)
30
(mV)
25
20
Vcc = 12 V
Tj = 25 °
VMULT = 0 to 3V
VFF = 3V
15 VMULT = 0 to 0.7V
VFF = 0.7V
10
5
0
0 0.628 1.256 1.884 2.512 3.14
θ (°)
Figure 15. Ic latch-off level on current sense vs
TJ
Vpin4
2.0
(V)
1.8
Vcc = 12 V
1.6
1.4
1.2
1.0
-50
0 50 100
Tj (°C)
150
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12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ DAP005 Schematic.PDF ] |
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