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PDF CH7025 Data sheet ( Hoja de datos )
| Número de pieza | CH7025 | |
| Descripción | TV/VGA Encoder | |
| Fabricantes | Chrontel | |
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Chrontel
CH7025/CH7026
Brief Datasheet
CH7025/CH7026 TV/VGA Encoder
Features
General Description
• TV encoder targets the handheld devices and other appropriate The CH7025/CH7026 is a device targeting
display devices used in consumer products. (i.e. automobile) handheld and similar systems which accept digital
• Support multiple output formats. Such as SDTV format (NTSC input signal, and encodes and transmits data
and PAL), HDTV format for 480p,576p,720p and 1080i,
analog RGB output for VGA. Sync signals can be provided in
separated or composite manner (programmable composite sync
through 10-bit DACs. The device is able to encode
the video signals and generate synchronization
generation).
signals SDTV format for NTSC and PAL
• Three on-chip 10-bit high speed DACs providing flexible standards and HDTV format for 480p,576p,720p
output capabilities. Such as single, double or triple CVBS and 1080i. Analog RGB output and composite
outputs, YPbPr output, RGB output and simultaneous CVBS SYNC signal are also supported. The device
and S-video outputs.
accepts different data formats including RGB and
•
•
•
16Mbits SDRAM is used as frame buffer. Supporting for frame
rate conversion.
Flexible up and down scaling engine is embedded including de-
flickering capability.
Programmable 24-bit/18-bit/16-bit/15-bit/12-bit/8-bit digital
YCbCr (e.g. RGB565, RGB666, RGB888, ITU656
like YCbCr, etc.). 16Mbit SDRAM is embedded in
package. Frame rate conversion and Image rotation
are possible.
input interface supports various RGB (RGB888, RGB666,
RGB565 and etc), YCbCr (4:4:4 YCbCr, ITU656) and 2x or 3x
multiplexed input. CPU interface are also supported.
• Support for flexible input resolution up to 800x800 and
1024x680.
• Pixel by pixel brightness, contrast, hue and saturation
adjustment for each kind of output is supported. (For RGB
output, only brightness and contrast adjustment is supported).
• Pixel by pixel horizontal position adjustment and line by line
vertical position adjustment are supported.
• 90/180/270 degree image rotation and vertical or horizontal flip
functions are supported.
• Macrovision 7.1.L1 for SDTV is supported in CH7025.
(CH7026 is Non-Macrovision part.)
• MacrovisionTM copy protection support for progressive scan
TV (480p, 576p CH7025 only)
• CGMS-A support for SDTV and HDTV
• TV/Monitor connection detect capability. DAC can be switched
off based on detection result. (Driver support is required)
• Programmable power management.
• Flexible pixel clock frequency from graphics controller is
supported. (2.3MHz –120MHz) Flexible input clock from
crystal or oscillator is supported. (2.3MHz – 64MHz)
• Only slave mode supported.
• Offered in BGA or QFP package.
• Fully programmable through serial port.
• IO and SPC/SPD voltage supported is from 1.2V to 3.3V.
Note: the above feature list is subject to change without notice. Please contact Chrontel for more information
and current updates.
209-1000-004 Rev. 1.1, 12/3/2008
1
1 page  
CHRONTEL
CH7025/CH7026
1.2 Pin Description
Table 1: Pin Name Description (BGA Package)
Pin #
A3, E4, B4, A4,
E5, B5, A5, D4,
D5, D6, A7, E6,
B7, A8, F6, B8,
B9, C9, C8, D9,
D8, E8, F7, E9
C2
Type
In
Symbol
D[23:0]
In/Out V
B3 In/Out H/WEB
A2 In DE/CSB
D2 In AS
F5 In ATPG
C1 In ResetB
K9 In/Out SPD
L9 In SPC
Description
Data[0] through Data[23] Inputs
These pins accept the 24 data inputs from a digital video
port of a graphics controller. The swing is defined by
VDDIO.
Vertical Sync Input / Output
When the SYO control bit is low, this pin accepts a vertical
sync input for use with the input data. The amplitude will
be 0 to VDDIO.
When the SYO control bit is high, the device will output a
vertical sync pulse. The output is driven from the VDDIO
supply.
Horizontal Sync Input / Output
When the SYO control bit is low, this pin accepts a
horizontal sync input for use with the input data. The
amplitude will be 0 to VDDIO.
When the SYO control bit is high, the device will output a
horizontal sync pulse. The output is driven from the
VDDIO supply.
It is also the WEB signal of CPU interface.
Data Input Indicator
When the pin is high, the input data is active.
When the pin is low, the input data is blanking.
It is also the CSB signal of CPU interface
The amplitude will be 0 to VDDIO.
Address select
ATPG Enable
(Internally pull-down)
This pin should be left open or pulled low with a 10k
resistor in the application. This pin configures the pre-
condition for scan chain and boundary scan test when high.
Otherwise it should be low. Voltage level is 0 to 3.3V.
Reset * Input
When this pin is low, the device is held in the hardware
reset condition. When this pin is high, reset is controlled
through the serial port.
Serial Port Data Input / Output
This pin functions as the bi-directional data pin of the serial
port. External pull-up resister is required.
Serial Port Clock Input
This pin functions as the clock pin of the serial port.
External pull-up resister is required.
209-1000-004 Rev. 1.1, 12/3/2008
5
5 Page 
CHRONTEL
CH7025/CH7026
Disclaimer
This document provides technical information for the user. Chrontel reserves the right to make changes at
any time without notice to improve and supply the best possible product and is not responsible and does not
assume any liability for misapplication or use outside the limits specified in this document. We provide no
warranty for the use of our products and assume no liability for errors contained in this document. The
customer should make sure that they have the most recent data sheet version. Customers should take
appropriate action to ensure their use of the products does not infringe upon any patents. Chrontel, Inc.
respects valid patent rights of third parties and does not infringe upon or assist others to infringe upon such
rights.
Chrontel PRODUCTS ARE NOT AUTHORIZED FOR AND SHOULD NOT BE USED WITHIN LIFE SUPPORT
SYSTEMS OR NUCLEAR FACILITY APPLICATIONS WITHOUT THE SPECIFIC WRITTEN CONSENT OF
Chrontel. Life support systems are those intended to support or sustain life and whose failure to perform when used as
directed can reasonably expect to result in personal injury or death.
Part Number
CH7025B-GF
CH7025B-GFI
CH7025B-TF
CH7025B-TFI
CH7026B-GF
CH7026B-GFI
CH7026B-TF
CH7026B-TFI
ORDERING INFORMATION
Package Type
Copy
Protection
Operating Temperature Range
80TFBGA, Lead-free Macrovision™ Commercial : -20 to 70°C
80TFBGA, Lead-free Macrovision™ Industrial : -40 to 85°C
80LQFP, Lead-free Macrovision™ Commercial : -20 to 70°C
80LQFP, Lead-free Macrovision™ Industrial : -40 to 85°C
80TFBGA, Lead-free None
Commercial : -20 to 70°C
80TFBGA, Lead-free None
Industrial : -40 to 85°C
80LQFP, Lead-free None
Commercial : -20 to 70°C
80LQFP, Lead-free None
Industrial : -40 to 85°C
©2008 Chrontel All Rights Reserved.
Chrontel
Chrontel International Limited
129 Front Street, 5th floor,
Hamilton, Bermuda HM12
www.chrontel.com
E-mail: [email protected]
209-1000-004 Rev. 1.1, 12/3/2008
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet CH7025.PDF ] | |
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