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Teilenummer | PEF24911 |
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Beschreibung | Quad ISDN 2B1Q Echocanceller Digital Front End | |
Hersteller | Infineon Technologies | |
Logo | ||
Gesamt 30 Seiten Data Sheet, DS 3, July 2001
DFE-Q V2.1
Quad ISDN 2B1Q
Echocanceller Digital
Front End
PEF 24911 Version 2.1
Wired
Communications
Never stop thinking.
PEF 24911
Table of Contents
Page
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.4
4.4.1
4.4.1.1
4.4.1.2
4.4.1.3
4.4.1.4
4.4.1.5
4.4.2
4.4.3
4.4.3.1
4.4.3.2
4.4.4
4.4.4.1
4.4.4.2
4.4.4.3
4.4.4.4
4.4.4.5
4.4.4.6
4.4.4.7
4.4.4.8
4.4.4.9
4.4.5
Complete Activation Initiated by LT . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Activation with ACT-Bit Status Ignored by the Exchange Side . . . . . . . 74
Complete Activation Initiated by TE . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Complete Deactivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Partial Activation (U Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Activation Initiated by LT with U Active . . . . . . . . . . . . . . . . . . . . . . . . . 82
Activation Initiated by TE with U Active . . . . . . . . . . . . . . . . . . . . . . . . . 84
Deactivating S/T-Interface Only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Maintenance and Test Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Test Loopbacks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Analog Loopback (No.1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Loopback No.2 - Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Loopback No.2 - Complete Loopback . . . . . . . . . . . . . . . . . . . . . . . . 91
Loopback No.2 - Single Channel Loopbacks . . . . . . . . . . . . . . . . . . . 93
Local Loopbacks Featured By Register LOOP . . . . . . . . . . . . . . . . . 95
Bit Error Rate Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Block Error Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Near-End and Far-End Block Error Counter . . . . . . . . . . . . . . . . . . . 97
Testing Block Error Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
System Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Single-Pulses Test Mode (SSP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Data Through Test Mode (DT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Reset Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Pulse Mask Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Power Spectral-Density Measurement . . . . . . . . . . . . . . . . . . . . . . 104
Total Power Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Return-Loss Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Quiet Mode Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Insertion Loss Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Boundary Scan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
5 Monitor Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
5.1 MON-0 - Exchanging EOC Information . . . . . . . . . . . . . . . . . . . . . . . . . . 110
5.2 MON-2 - Exchanging Overhead Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
5.3 MON-8 - Local Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
6
6.1
6.2
6.3
6.4
6.4.1
Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Register Summary
118
Reset of U-Transceiver Functions in State ’Deactivated’ . . . . . . . . . . . . 120
Mode Register Evaluation Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Detailed Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
LP_SEL - Line Port Selection Register . . . . . . . . . . . . . . . . . . . . . . . . 121
Data Sheet
2001-07-16
6 Page Quad ISDN 2B1Q Echocanceller Digital Front End
DFE-Q V2.1
PEF 24911
Version 2.1
1.1 Features
U-Interface
• Digital part of a two-chip solution featuring full duplex
data transmission and reception over two-wire metallic
subscriber loops providing 4x ISDN basic rate access
or IDSL access at 144 kbit/s
• Conforms to:
P-MQFP-64
– ANSI T1.601–1998
– ETSI TS 102 080 (1998)
– Recommendation ITU-T G.961
• 2B1Q-block code (2 binary, 1 quaternary) at 80-kHz symbol rate
• LT mode
• Data rate of the system interface programmable
• Activation/ deactivation controller
• 15 s start-up guard timer (T1) can be disabled for use in repeater applications
• Adaptive echo cancellation and equalization
• Automatic gain control and polarity adaptation
• Clock recovery (frame and bit synchronization) in all applications
• Built-in wake-up unit for activation from power-down state.
System Interface
• IOM®-2 interface with programmable data rates (1 Mbit/s to 4 Mbit/s)
• SW controlled I/O ports for relay driver and power feeder control
– 4 relay driver pins per port
– 2 status pins per port
Type
PEF 24911
Data Sheet
Package
P-MQFP-64
2
2001-07-16
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ PEF24911 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
PEF24911 | Quad ISDN 2B1Q Echocanceller Digital Front End | Infineon Technologies |
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