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R5F51303ADFM Schematic ( PDF Datasheet ) - Renesas

Teilenummer R5F51303ADFM
Beschreibung 32-bit RX MCUs
Hersteller Renesas
Logo Renesas Logo 




Gesamt 30 Seiten
R5F51303ADFM Datasheet, Funktion
Datasheet
RX130 Group
Renesas MCUs
32-MHz, 32-bit RX MCUs, 50 DMIPS, up to 128-KB flash memory,
R01DS0273EJ0100
Rev.1.00
Oct 30, 2015
up to 36 pins capacitive touch sensing unit, up to 6 comms channels, 12-bit A/D, D/A, RTC,
IEC60730 compliance, 1.8-V to 5.5-V single supply
Features
32-bit RX CPU core
Max. operating frequency: 32 MHz
Capable of 50 DMIPS in operation at 32 MHz
Accumulator handles 64-bit results (for a single instruction) from
32-bit × 32-bit operations
Multiplication and division unit handles 32-bit × 32-bit operations
(multiplication instructions take one CPU clock cycle)
Fast interrupt
CISC Harvard architecture with 5-stage pipeline
Variable-length instructions, ultra-compact code
On-chip debugging circuit
Low power design and architecture
Operation from a single 1.8-V to 5.5-V supply
Three low power consumption modes
Low power timer (LPT) that operates during the software standby state
Supply current
High-speed operating mode: 96 A/MHz
Supply current in software standby mode: 0.37 A
Recovery time from software standby mode: 4.8 s
On-chip flash memory for code, no wait states
Operation at 32 MHz, read cycle of 31.25 ns
No wait states for reading at full CPU speed
Programmable at 1.8 V
For instructions and operands
On-chip data flash memory
8 Kbytes (1,000,000 program/erase cycles (typ.))
BGO (Background Operation)
On-chip SRAM, no wait states
10- to 16-Kbyte size capacities
DTC
Four transfer modes
Transfer can be set for each interrupt source.
ELC
Module operation can be initiated by event signals without using
interrupts.
Linked operation between modules is possible while the CPU is sleeping.
Reset and supply management
Eight types of reset, including the power-on reset (POR)
Low voltage detection (LVD) with voltage settings
Clock functions
External clock input frequency: Up to 20 MHz
Main clock oscillator frequency: 1 to 20 MHz
Sub clock oscillator frequency: 32.768 kHz
PLL circuit input: 4 MHz to 8 MHz
Low-speed on-chip oscillator: 4 MHz
High-speed on-chip oscillator: 32 MHz ± 1 %
IWDT-dedicated on-chip oscillator: 15 kHz
Generate a 32.768 kHz clock for the real-time clock
On-chip clock frequency accuracy measurement circuit (CAC)
Realtime clock
Adjustment functions (30 seconds, leap year, and error)
Calendar count mode or binary count mode selectable
Independent watchdog timer
15-kHz on-chip oscillator produces a dedicated clock signal to drive
IWDT operation.
Useful functions for IEC60730 compliance
Self-diagnostic and disconnection-detection assistance functions for
the A/D converter, clock frequency accuracy measurement circuit,
independent watchdog timer, RAM test assistance functions using the
DOC, etc.
PLQP0080KB-B 12 × 12mm, 0.5mm pitch
PLQP0064GA-A 14 × 14mm, 0.8mm pitch
PLQP0064KB-C 10 × 10mm, 0.5mm pitch
PLQP0048KB-B 7 × 7mm, 0.5mm pitch
PWQN0048KB-A 7 × 7mm, 0.5mm pitch
MPC
Input/output functions selectable from multiple pins
Up to 6 communication functions
SCI with many useful functions (up to 4 channels)
Asynchronous mode (Fine adjustable baud rate: 0 to 255/255), clock
synchronous mode, smart card interface mode
I2C bus interface: Transfer at up to 400 kbps, capable of SMBus
operation (one channel)
RSPI (one channel): Transfer at up to 16 Mbps
Up to 12 extended-function timersMPC
16-bit MTU: input capture, output compare, complementary PWM
output, phase counting mode (six channels)
8-bit TMR (four channels)
16-bit compare-match timers (two channels)
12-bit A/D converter
Capable of conversion within 1.4 μs
17 channels
Sampling time can be set for each channel
Conversion results compare features
Self-diagnostic function and analog input disconnection detection
assistance function
Double trigger (data duplication) function for motor control
D/A converter
Two channels
Capacitive touch sensing unit
Self-capacitance method: A single pin configures a single key,
supporting up to 36 keys
Mutual capacitance method: Matrix configuration with 36pins, supporting
up to 324 keys
Comparator B
Two channels
General I/O ports
5-V tolerant, open drain, input pull-up, switching of driving capacity
Temperature sensor
Unique ID
32-byte ID code for the MCU
Operating temperature range
 40 to +85C
 40 to +105C
Applications
General industrial and consumer equipment
R01DS0273EJ0100 Rev.1.00
Oct 30, 2015
Page 1 of 116






R5F51303ADFM Datasheet, Funktion
RX130 Group
1. Overview
1.2 List of Products
Table 1.3 is a lists of products, and Figure 1.1 shows how to read the product part no., memory capacity, and package
type.
Table 1.3
List of Products
Group
RX130
Part No.
R5F51305ADFN
R5F51305ADFM
R5F51305ADFK
R5F51305ADFL
R5F51305ADNE
R5F51303ADFN
R5F51303ADFM
R5F51303ADFK
R5F51303ADFL
R5F51303ADNE
R5F51305AGFN
R5F51305AGFM
R5F51305AGFK
R5F51305AGFL
R5F51305AGNE
R5F51303AGFN
R5F51303AGFM
R5F51303AGFK
R5F51303AGFL
R5F51303AGNE
Orderable Part No.
R5F51305ADFN#30
R5F51305ADFM#30
R5F51305ADFK#30
R5F51305ADFL#30
R5F51305ADNE#U0
R5F51303ADFN#30
R5F51303ADFM#30
R5F51303ADFK#30
R5F51303ADFL#30
R5F51303ADNE#U0
R5F51305AGFN#30
R5F51305AGFM#30
R5F51305AGFK#30
R5F51305AGFL#30
R5F51305AGNE#U0
R5F51303AGFN#30
R5F51303AGFM#30
R5F51303AGFK#30
R5F51303AGFL#30
R5F51303AGNE#U0
Package
PLQP0080KB-B
PLQP0064KB-C
PLQP0064GA-A
PLQP0048KB-B
PWQN0048KB-A
PLQP0080KB-B
PLQP0064KB-C
PLQP0064GA-A
PLQP0048KB-B
PWQN0048KB-A
PLQP0080KB-B
PLQP0064KB-C
PLQP0064GA-A
PLQP0048KB-B
PWQN0048KB-A
PLQP0080KB-B
PLQP0064KB-C
PLQP0064GA-A
PLQP0048KB-B
PWQN0048KB-A
ROM
Capacity
RAM
Capacity
E2
DataFlash
Maximum
Operating
Frequency
Operating
Temperature
128 Kbytes 16 Kbytes
40 to 85°C
64 Kbytes 10 Kbytes
8 Kbytes
32 MHz
128 Kbytes 16 Kbytes
40 to 105°C
64 Kbytes 10 Kbytes
R01DS0273EJ0100 Rev.1.00
Oct 30, 2015
Page 6 of 116

6 Page









R5F51303ADFM pdf, datenblatt
RX130 Group
1. Overview
1.5 Pin Assignments
Figure 1.3 to Figure 1.6 show the pin assignments. Table 1.5 to Table 1.7 show the lists of pins and pin functions.
PE2
PE1
PE0
PD2
PD1
PD0
P47
P46
P45
P44
P43
P42
P41
PJ7/VREFL0
P40
PJ6/VREFH0
AVCC0
P07
AVSS0
P05
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
RX130 Group
PLQP0080KB-B
(80-pin LFQFP)
(Top view)
40 PC2
39 PC3
38 PC4
37 PC5
36 PC6
35 PC7
34 P54
33 P55
32 PH0
31 PH1
30 PH2
29 PH3
28 P12
27 P13
26 P14
25 P15
24 P16
23 P17
22 P20
21 P21
Note: This figure indicates the power supply pins and I/O ports.
For the pin configuration, see the table “List of Pins and Pin Functions (80-Pin LFQFP)”.
Figure 1.3
Pin Assignments of the 80-Pin LFQFP
R01DS0273EJ0100 Rev.1.00
Oct 30, 2015
Page 12 of 116

12 Page





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