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RDA8851AL Schematic ( PDF Datasheet ) - RDA

Teilenummer RDA8851AL
Beschreibung GSM/GPRS Single-Chip Terminal
Hersteller RDA
Logo RDA Logo 




Gesamt 30 Seiten
RDA8851AL Datasheet, Funktion
RDA8851AL Datasheet V1.06
RDA8851AL GSM/GPRS Single-Chip Terminal
FEATURES
External Memory Interface
Integrated 32Mb 1.8V Flash on chip, and also
Supports external SPI Flash
Integrated PSRAM on chip, 16Mb size
Power efficient using retention technology to
avoid floating lines
Flexible IO voltage
Connectivity
USB 1.1 Device
2 UART interface
1 SD controller
1 SD/SPI controller
SPI with multiple chip select
I2C controller
General Purpose I/Os
2 GPADC, 10bits, 2 channels
Audio
GSM/GPRS Modem
2 channels voice ADC, 8kHz, 13 bits/sample
for headset and on-board microphone
GPRS Class 10
Voice DAC, 8kHz, 13 bits/sample for
Quad bands integrated transceiver
receiver
Supports HR, FR, EFR, AMR voice codec
High fidelity Stereo DAC, up to 48kHz, 16
Triple SIM controller with integrated level shifters
bits per sample
Provide a complete GSM/GPRS data path with
Stereo Audio speaker driver
integrated RF transceiver, Saw-Less, only needs
1.5W differential output stereo amplifier for
external PA
loudspeaker, Class K
Stereo analog audio line input
Multimedia
Support camera interface up to 3Mpix sensors Debug
with 8 bit parallel or 1/2/4 data series
Host debug interface allowing non intrusive
interface,Support CSI camera interface
in depth investigation
Support LCD module interface with 8 bit parallel
GDB debugger
interface or SPI series interface
Execution logger and profiling through debug
Support up to 480X640 resolution
port
4-layers blending graphical engine capable of
High level text based debugging using Host
resizing and YUV2RGB conversion
debug or USB
Proprietary 16/32-bit digital signal processing
engine to improve computation performance
FM
Power Management
Integrated Broadcast FM tuner which can be
tuned world-wide frequency band
Power On reset control
Internal 32K OSC for standby/ shutoff/ sleep
state
Battery charger (from USB or AC charger)
Integrated all internal voltages from VBAT
Bluetooth
Integrated Bluetooth SoC complaint with 2.1
+ EDR standard
Provide all LDOs for external components
User Interface
APPLICATIONS
8x8 Keypad scanner with multiple key detection,
support ADC serial interface Keypad
Alerter
Light Pulse Generator for blinking LED
Multi-band GSM/GPRS Mobile Handsets, PDAs,
data terminals and Modems: GSM 850, GSM
900, DCS1800, PCS 1900.
Pulse Width Modulator for Keyboard or backlight
control
The high level of integration achieved on
Touch screen interface
RDA8851AL allows for highly featured phone without
LED drivers for LCD and keyboard backlight
increasing the BOM.
Calendar (Real Time Clock) with alarm
RDA Microelectronics Inc. CONFIDENTIAL
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RDA8851AL Datasheet, Funktion
RDA8851AL Datasheet V1.06
A. ARCHITECTURE OVERVIEW
RDA8851AL is a single chip GSM/GPRS solution which integrates Digital Baseband, PMIC, XCVER, Audio
CODEC, FM, and Bluetooth, as well as all the system requirements for a simple phone application.
Figure A.1 RDA8851AL Integrated IPs & Interfaces
RDA Microelectronics Inc. CONFIDENTIAL
6 / 92

6 Page









RDA8851AL pdf, datenblatt
RDA8851AL Datasheet V1.06
1 32 bits uptime counter at 16384Hz
1 Watchdog Timer
○ Debug Port
CPU Execution Logger (EXL): Generate strobe and output the selected CPU's program
counter
Program Execution Time Stamp (PXTS): Allow to profile running code
Hardware Signal Spy, selection of several hardware signal connected to pins.
Access to the last PC of the selected CPU when a watchdog reset occurs
○ General Purpose Analog to Digital Converter (GP ADC)
2 channel inputs
generate IRQ when programmed threshold is passed
○ Timing Control Unit (TCU)
Quarter bit precision
60 entries event table
○ System AHB Monitor (Sys AHB Monitor)
Measure some bandwidth information from the System AHB bus:
Global Bus usage
Master Bus usage and latency
Slave Bus usage and access duration
Special resource measurement
Write detection to a single word location
○ Base Band AHB Monitor (BB AHB Monitor)
(Same features as System AHB Monitor)
○ System IRQ Controller (Sys IRQ)
Several masking levels:
Module level
IRQ Control level
○ BIST
Internal RAMs and ROM test to reduce testing cost in production
○ COM Registers
Communication registers for inter-CPU communication and synchronization
○ USB Controller
Fully compliant to USB Specification Version 1.1
Slave Full Speed (12Mbps) Device
● Base Band Modules
○ Base Band CPU (BCPU) and Base Band Process Accelerator Modules
RDA RISC Core
32x32 bits Multiplier Accumulator (MAC)
16/32 bit instruction set
1 kByte Instruction Cache
1 kByte Data Cache
GSM/GPRS Dedicated accelerators
○ BB AHB to Sys AHB (AHB2AHB)
(See AHB System Modules for details)
RDA Microelectronics Inc. CONFIDENTIAL
12 / 92

12 Page





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