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Número de pieza | H9DP32A4JJBCGR | |
Descripción | 4GB eNAND Flash(x8) + 4Gb Mobile DDR (x32) | |
Fabricantes | Hynix | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de H9DP32A4JJBCGR (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! CI-MCP Specification
4GB eNAND Flash(x8)
+ 4Gb Mobile DDR (x32)
This document is a general product description and is subject to change without notice. SK hynix does not assume any responsibility
for use of circuits described. No patent licenses are implied.
Rev 0.1 / Nov. 2012
1
1 page Functional Block Diagram
e-NAND Block Diagram
Preliminary
H9DP32A4JJBCGR
eNAND 4GB(x8) / Mobile DDR 4Gb(x32, 2CS)
MultiMediaCard
Interface
MMC Controller
Data In/Out
Control
NAND Flash
DRAM Block Diagram
e-NAND
CS0
CKE0
CS1
CKE1
2Gb x32 device
(64M x 32)
2Gb x32 device
(64M x 32)
CK, CK
CAS,RAS,WE
A0~A13
BA0, BA1
DQ0~DQ31
DM0~DM3
DQS0~DQS3
VDD, VDDQ,
VSS, VSSQ
Note
1. Total current consumption is dependent to user operating conditions. AC and DC Characteristics shown in
this specification are based on a single die. See the section of “DC Parameters and Operating Conditions”
Rev 0.1 / Nov. 2012
5
5 Page Preliminary
H9DP32A4JJBCGR
eNAND 4GB(x8) / Mobile DDR 4Gb(x32, 2CS)
2. e‐NAND Features
2.1 Bus Modes
• Boot mode
e‐NAND will be in boot mode after power cycle, reception of CMD0 with argument of 0xF0F0F0F0 or assertion of hardware
reset signal.
• Identification Mode
e‐NAND will be in identification mode when boot operation mode is finished or if host does not support a boot operation
mode. e‐NAND will be in this mode until the SET_RELATIVE_ADDR command (CMD3) is received.
• Interrupt Mode
e‐NAND does not support Interrupt Mode.
• Data Transfer Mode
e‐NAND will enter Data Transfer Mode once RCA is assigned to it. The host will enter Data Transfer Mode after identifying e‐
NAND on the bus.
• Inactive Mode
e‐NAND will enter to inactive mode when e‐NAND is operating invalid voltage range or access mode. Also e‐NAND can be
set to inactive mode by Go_INACTIVE_STATE command (CMD15). e‐NAND can change from inactive mode to Pre‐idle state
by reset.
Rev 0.1 / Nov. 2012
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet H9DP32A4JJBCGR.PDF ] |
Número de pieza | Descripción | Fabricantes |
H9DP32A4JJBCGR | 4GB eNAND Flash(x8) + 4Gb Mobile DDR (x32) | Hynix |
H9DP32A4JJBCGR-KEM | 4GB eNAND Flash(x8) + 4Gb Mobile DDR (x32) | Hynix |
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