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RJK60S8DPK-M0 Schematic ( PDF Datasheet ) - Renesas

Teilenummer RJK60S8DPK-M0
Beschreibung High Speed Power Switching SJ MOS FET
Hersteller Renesas
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Gesamt 8 Seiten
RJK60S8DPK-M0 Datasheet, Funktion
Preliminary Datasheet
RJK60S8DPK-M0
600V - 55A - SJ MOS FET
High Speed Power Switching
R07DS0644EJ0200
Rev.2.00
Aug 23, 2012
Features
Superjunction MOSFET
Low on-resistance
RDS(on) = 0.045 typ. (at ID = 27.5 A, VGS = 10 V, Ta = 25C)
High speed switching
tf = 54 ns typ. (at ID = 27.5 A, VGS = 10 V, RL = 10.9 , Rg = 10 , Ta = 25C)
Outline
RENESAS Package code: PRSS0004ZH-A
(Package name:TO-3PSG)
4
D
1
23
G
S
1. Gate
2. Drain
3. Source
4. Drain
Absolute Maximum Ratings
Item
Drain to source voltage
Gate to source voltage
Drain current
Ta = 25C
Ta = 100C
Drain peak current
Body-drain diode reverse drain current
Body-drain diode reverse drain peak current
Avalanche current
Avalanche energy
Channel dissipation
Channel to case thermal impedance
Channel temperature
Storage temperature
Notes: 1. Limited by Tch max.
2. STch = 25C, Tch 150C
3. Value at Tc = 25C
Symbol
VDSS
VGSS
ID Note1
ID Note1
ID
Note1
(pulse)
IDR Note1
IDR (pulse) Note1
IAP Note2
EAR Note2
Pch Note3
ch-c
Tch
Tstg
Ratings
600
+30, 20
55
34.8
110
55
110
9.2
4.61
416.6
0.3
150
–55 to +150
(Ta = 25°C)
Unit
V
V
A
A
A
A
A
A
mJ
W
C/W
C
C
R07DS0644EJ0200 Rev.2.00
Aug 23, 2012
Page 1 of 7






RJK60S8DPK-M0 Datasheet, Funktion
RJK60S8DPK-M0
Switching Time Test Circuit
Vin Monitor
10 Ω
Vin
10 V
D.U.T.
Vout
Monitor
RL
VDD
= 300 V
Preliminary
Waveform
90%
Vin
Vout
10%
10%
10%
td(on)
90%
tr
90%
td(off)
tf
Avalanche Test Circuit
VDS
Monitor
L
IAP
Monitor
Rg
D. U. T
VDD
100 Ω
Vin
Avalanche Waveform
EAR =
1
2
L IAP2
VDSS
VDSS VDD
IAP
ID
V(BR)DSS
VDS
VDD
0
R07DS0644EJ0200 Rev.2.00
Aug 23, 2012
Page 6 of 7

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