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PDF AK4951 Data sheet ( Hoja de datos )

Número de pieza AK4951
Descripción 24bit Stereo CODEC
Fabricantes AKM 
Logotipo AKM Logotipo



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[AK4951]
AK4951
24bit Stereo CODEC with MIC/HP/SPK-AMP
1. General Description
The AK4951 is a low power 24-bit stereo CODEC with a microphone, headphone and speaker amplifiers.
The AK4951 supports sampling frequency from 8kHz to 48kHz. It is suitable for a wide range of application
from speech signal processing for narrowband, wideband and super wideband to sound signal processing for
audio band.
The input circuits include a microphone amplifier, an automatic wind noise reduction filter of the proprietary
algorithms and a high performance digital ALC (automatic level control) circuit, therefore the AK4951 can
record with high-quality sound regardless of whether indoors or outdoors. In addition, the output circuits
include a cap-less headphone amplifier with a negative voltage generated by charge pump circuit and a speaker
amplifier with 1W output power. It is suitable for various products as well as portable applications with
recording/playback function.
The AK4951 are available in a small 32-pin QFN (4mm x 4mm, 0.4mm pitch: AK4951EN) and a 32-pin BGA
(3.5mm x 3.5mm, 0.5mm pitch: AK4951EG) packages saving mounting area on the board.
Application:
IP Camera
Digital Camera
IC Recorder
Tablet
Wireless Headphone
Headset
2. Features
1. Recording Functions
Analog Input
(AK4951EN) 3 Stereo Single-ended inputs with Selectors
(AK4951EG) 2 Stereo and 1 Monaural Single-ended inputs with Selectors
Microphone Amplifier: +30dB ~ 0dB, 3dB Step
Microphone Power Supply: 2.0V or 2.4V, Noise Level= 108dBV
Digital ALC (Automatic Level Control)
- Setting Range: +36dB  52.5dB, 0.375dB Step & Mute
ADC Performance: S/(N+D): 83dB, DR, S/N: 88dB (MIC-Amp=+18dB)
S/(N+D): 85dB, DR, S/N: 96dB (MIC-Amp=0dB)
Microphone Sensitivity Correction
Automatic Wind Noise Reduction Filter
5-Band Notch Filter: Include Dynamic Gain Control
Stereo Separation Emphasis Circuit
Digital Microphone Interface
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AK4951 pdf
[AK4951]
[AK4951EN]
Internal
MIC
External
MIC
Line Input
BEEP
Mono
Speaker
Cap-less
Headphone
4. Block Diagram
VCOM VSS1 REGFIL AVDD
DVDD TVDD VSS2
MPWR2
MPWR1
LIN1
RIN1
LIN2
RIN2
LIN3
SVDD
VSS3
RIN3/ BEEP
PMMP
MIC Power
Supply
AVDD
Analog Block
PMADL
MIC-Amp
+30~0dB
PMADR
PMADL or PMADR
ADC HPF
PMBP
LDO
2.3V
Digital Core,
Headphone-Amp
MIC-Power,
Charge-pump
Control
Register
PMPFIL
MIC Sensitivity
Correction
Auto HPF
HPF2
LPF
Stereo Emphasis
4-band EQ
ALC
1 Band EQ
Audio
I/F
SPP/LOUT
SPN/ROUT
PMSL
PMDAC
DAC
DVOL
SMUTE
Mono/
Stereo
PFVOL
HPL
PMHPL
HPR
PMHPR
PMOSC
Oscillator
PMHPL or PMHPR
Charge Pump
AVDD
PMPLL
PLL
PDN
SDA
SCL
BICK
LRCK
SDTO
SDTI
MCKI
VEE CN CP
Figure 1. Block Diagram (AK4951EN)
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AK4951 arduino
[AK4951]
■ PIN/FUNCTION
[AK4951EN]
No. Pin Name I/O Function
1 LIN3
I Lch Analog Input 3 pin
2 RIN2
I Rch Analog Input 2 Pin
3 LIN2
I Lch Analog Input 2 pin
4 MPWR2 O MIC Power Supply 2 Pin
5 MPWR1
6
RIN1
DMCLK
7
LIN1
DMDAT
O MIC Power Supply 1 Pin
I Rch Analog Input 1 Pin
O Digital Microphone Clock pin
I Lch Analog Input 1 Pin
I Digital Microphone Data Input Pin
(DMIC bit = “0”: default)
(DMIC bit = “1”)
(DMIC bit = “0”: default)
(DMIC bit = “1”)
8 PDN
I
Reset & Power-down Pin
L: Reset & Power-down, H: Normal Operation
9 SCL
I Control Data Clock Pin
10 SDA
I/O Control Data Input/Output Pin
11 SDTI
I Audio Serial Data Input Pin
12 SDTO
O Audio Serial Data Output Pin
13 LRCK
I/O Input/Output Channel Clock Pin
14 BICK
I/O Audio Serial Data Clock Pin
15 MCKI
I External Master Clock Input Pin
16 TVDD
- Digital I/O Power Supply Pin, 1.6 or (DVDD-0.2) ~ 3.5V
17 VSS3
- Ground 3 Pin
18 SVDD
19
SPN
ROUT
20
SPP
LOUT
- Speaker-Amp Power Supply Pin, 1.8 ~ 5.5V
O Speaker-Amp Negative Output Pin
O Rch Stereo Line Output Pin
O Speaker-Amp Positive Output Pin
O Lch Stereo Line Output Pin
(LOSEL bit = 0: default)
(LOSEL bit = 1)
(LOSEL bit = 0: default)
(LOSEL bit = 1)
21 DVDD
- Digital Power Supply Pin, 1.6 ~ 1.98V
22 HPL
O Lch Headphone-Amp Output Pin
23 HPR
O Rch Headphone-Amp Output Pin
24 VEE
O
Charge-Pump Circuit Negative Voltage Output Pin
This pin must be connected to VSS2 with 2.2μF±20% capacitor in series.
25 VSS2
- Ground 2 Pin
26 CP
O
Positive Charge-Pump Capacitor Terminal Pin
This pin must be connected to CN pin with 2.2μF±20% capacitor in series.
27 CN
I
Negative Charge-Pump Capacitor Terminal Pin
This pin must be connected to CP pin with 2.2μF±20% capacitor in series.
28 AVDD
- Analog Power Supply Pin, 2.8 ~ 3.5V
29 VSS1
- Ground 1 Pin
Common Voltage Output Pin
30 VCOM
O Bias voltage of ADC inputs and DAC outputs.
This pin must be connected to VSS1 with 2.2F±20% capacitor in series.
31 REGFIL
32
RIN3
BEEP
O
LDO Voltage Output pin for Analog Block (typ 2.3V)
This pin must be connected to VSS1 with 2.2μF±20% capacitor in series.
I Rch Analog Input 3 Pin
(PMBP bit = 0: default)
I Beep Signal Input Pin
(PMBP bit = 1)
Note 2. All input pins except analog input pins (LIN1, RIN1, LIN2, RIN2, LIN3, RIN3/BEEP) must not be
allowed to float.
014008541-E-01
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2015/09

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