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74VHC541-Q100 Schematic ( PDF Datasheet ) - NXP

Teilenummer 74VHC541-Q100
Beschreibung Octal buffer/line driver
Hersteller NXP
Logo NXP Logo 



Gesamt 17 Seiten
		
74VHC541-Q100 Datasheet, Funktion
74VHC541-Q100;
74VHCT541-Q100
Octal buffer/line driver; 3-state
Rev. 1 — 4 June 2013
Product data sheet
1. General description
The 74VHC541-Q100; 74VHCT541-Q100 are high-speed Si-gate CMOS devices.
The 74VHC541-Q100; 74VHCT541-Q100 are octal non-inverting buffer/line drivers with
3-state bus compatible outputs.
The output enable inputs OE0 and OE1 control the 3-state outputs.
A HIGH on OEn causes the outputs to assume a high-impedance OFF-state.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accept voltages higher than VCC
The 74VHC541-Q100 operates with CMOS input level
The 74VHCT541-Q100 operates with TTL input level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options






74VHC541-Q100 Datasheet, Funktion
NXP Semiconductors
74VHC541-Q100; 74VHCT541-Q100
Octal buffer/line driver; 3-state
Table 6. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
CI input
capacitance
CO output
capacitance
For type 74VHCT541-Q100
VIH HIGH-level VCC = 4.5 V to 5.5 V
input voltage
VIL LOW-level VCC = 4.5 V to 5.5 V
input voltage
VOH
VOL
IOZ
II
ICC
ICC
CI
HIGH-level VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 50 A
IO = 8.0 mA
LOW-level
VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 50 A
IO = 8.0 mA
OFF-state
output current
per input pin; VI = VIH or VIL;
VCC = 5.5 V; IO = 0 A;
VO = VCC or GND;
other pins at VCC or GND
input leakage VI = VCC or GND;
current
VCC = 0 V to 5.5 V
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
additional
per input pin;
supply current VI = VCC 2.1 V; IO = 0 A;
other pins at VCC or GND;
VCC = 4.5 V to 5.5 V
input
capacitance
CO output
capacitance
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
- 3.0 10
-
10
-
10 pF
- 4.0 -
-
-
-
- pF
2.0 - - 2.0
-
2.0
-V
- - 0.8 -
0.8
-
0.8 V
4.4 4.5 -
4.4
-
4.4
-V
3.94 - - 3.8 - 3.70 - V
- 0 0.1 -
0.1
-
0.1 V
- - 0.36 -
0.44
-
0.55 V
- - 0.25 - 2.5 - 10.0 A
- - 0.1 -
1.0
-
2.0 A
- - 4.0 -
40
-
80 A
- - 1.35 -
1.5
-
1.5 mA
- 3 10 -
10
-
10 pF
- 4.0 -
-
-
-
- pF
74VHC_VHCT541_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 4 June 2013
© NXP B.V. 2013. All rights reserved.
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6 Page







74VHC541-Q100 pdf, datenblatt
NXP Semiconductors
74VHC541-Q100; 74VHCT541-Q100
Octal buffer/line driver; 3-state
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
y
Z
20
D
c
11
EA
X
HE v M A
pin 1 index
1
e
10
wM
bp
A2
A1
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
D (1) E (2) e
6.6
6.4
4.5
4.3
0.65
HE
6.6
6.2
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT360-1
MO-153
L Lp Q v w y Z (1) θ
1
0.75 0.4
0.50 0.3
0.2 0.13 0.1
0.5
0.2
8o
0o
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 9. Package outline SOT360-1 (TSSOP20)
74VHC_VHCT541_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 4 June 2013
© NXP B.V. 2013. All rights reserved.
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