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PDF CIC61508 Data sheet ( Hoja de datos )
| Número de pieza | CIC61508 | |
| Descripción | Safety Monitor | |
| Fabricantes | Infineon Technologies | |
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CIC61508
Safety Monitor
User's Manual
R e l e a s e v2.2
Microcontrollers
1 page  
Safety Monitor
CIC61508
Table of Contents
Page
1
1.1
1.2
1.2.1
1.2.2
1.3
1.4
1.5
1.6
1.7
1.8
Introduction ...................................................................................................................................9
Scope ..............................................................................................................................................9
Acronyms, Abbreviations and Definitions .......................................................................................9
Abbreviations...................................................................................................................................9
Definitions........................................................................................................................................9
References ....................................................................................................................................10
Overview of Safety Architecture....................................................................................................10
Description of the CIC61508 Safety Monitor.................................................................................11
Feature Summary .........................................................................................................................12
Special Function Register (SFR) Mapping....................................................................................13
NVM (Non-Volatile Memory) Address Mapping ............................................................................15
2
2.1
2.1.1
2.1.1.1
2.1.1.2
2.1.1.3
2.1.1.4
2.1.1.5
2.1.1.6
2.1.2
2.1.2.1
2.1.2.2
2.1.2.3
2.1.3
2.2
2.2.1
2.2.2
2.2.3
2.2.3.1
2.2.3.2
2.2.3.3
2.2.3.4
2.2.3.5
2.2.3.6
2.2.3.7
2.2.3.8
2.2.3.9
2.2.3.10
2.2.4
2.2.4.1
2.2.4.2
2.2.4.3
2.2.5
2.3
2.3.1
2.3.2
2.3.3
2.4
2.4.1
2.4.2
2.4.3
2.5
2.5.1
2.5.2
2.5.3
2.5.4
2.5.5
Functional Description ...............................................................................................................16
Built-In Self-Tests (BIST) ..............................................................................................................16
Start-Up BIST ................................................................................................................................16
ROM / PFLASH checksum check .................................................................................................16
Opcode check ...............................................................................................................................16
IRAM check ...................................................................................................................................16
XRAM check..................................................................................................................................16
DFLASH check..............................................................................................................................16
DFLASH configuration check ........................................................................................................16
Runtime BIST (Background BIST) ................................................................................................17
DFLASH Runtime Slice Check......................................................................................................17
Opcode Check...............................................................................................................................17
System Heartbeat Check ..............................................................................................................17
BIST Failure ..................................................................................................................................17
Integrity Monitor.............................................................................................................................18
Pass Counters (PASSCNTXX) .....................................................................................................18
System State Machine ..................................................................................................................19
State Transition .............................................................................................................................20
RESET -> NOT READY ................................................................................................................21
NOT READY -> READY................................................................................................................21
NOT READY-> Secure SPI...........................................................................................................21
READY -> NOT READY................................................................................................................21
READY -> ACTIVE........................................................................................................................21
ACTIVE -> TRIPPING 1 ................................................................................................................21
TRIPPING 1 -> TRIPPING 2 -> TRIPPING 3 -> DISABLED ........................................................21
DISABLED-> Secure SPI ..............................................................................................................21
DISABLED-> RESET ....................................................................................................................22
<State Name> -> DISABLED ........................................................................................................22
Integrity Monitor Configuration ......................................................................................................22
Integrity Monitor Increment and Decrement Value .......................................................................22
Monitor Function Enable ...............................................................................................................23
Trip Time .......................................................................................................................................23
Integrity Monitor Registers ............................................................................................................23
Serial Peripheral Interface.............................................................................................................29
SPI Communication Protocol ........................................................................................................29
SPI Error Handling ........................................................................................................................30
SPI Command Format ..................................................................................................................30
Sequencer .....................................................................................................................................32
Sequencer Operation ....................................................................................................................32
Sequencer Configuration ..............................................................................................................33
Sequencer Registers.....................................................................................................................35
Supply Voltage Monitor .................................................................................................................37
Supply Voltage Monitored Operation ............................................................................................37
Coherent Read ..............................................................................................................................37
Voltage Injection............................................................................................................................37
Supply Voltage Monitor Registers.................................................................................................38
Supply Voltage Monitor Configuration ..........................................................................................38
User's Manual
5 Release v2.2, Nov 2012
5 Page 
Safety Monitor
CIC61508
Introduction
Figure 1 Block Diagram of the Safety System
The architecture presented in Figure 1 shows the situation where the two processors (CPUp and CPUm),
are inside the same microcontroller. This is similar to the TriCore microcontrollers where CPUp is the TriCore
main CPU and CPUm is the Peripheral Controller Processor (PCP). The processor (CPUp) is responsible for
the execution of all safety-related applications covering all the safety loops. The second processor (CPUm)
acts as monitoring processor covering the execution integrity (mainly program sequence monitoring) of the
main processor. Because both CPUp and CPUm are in the same silicon, some situations exist where the
monitoring may fail because of common cause failures. Because of that possibility an external Safety Monitor
is required to monitor the execution of CPUm. The Safety Monitor itself can be a microcontroller or an ASIC.
The three components CPUp, CPUm and Safety Monitor participate in a closed monitoring loop.
1.5 Description of the CIC61508 Safety Monitor
The CIC61508 is a Companion Safety Monitor Chip to build up functional safety applications; examples
include airbag, Electrical Powered Steering (EPS) and damping systems. The chip is responsible for
monitoring the host microcontroller‘s behaviour. It can monitor the host microcontroller‘s power supply and
verify the host microcontroller‘s requests. It therefore serves as a diagnostic monitoring device to allow the
host microcontroller system to be SIL3 safety compliant.
The CIC61508 includes several modules such as a Sequencer, a Data Comparator, a Task Monitor, an
Integrity Monitor, Built-in Self Test (BIST), 4 Voltage Monitors and Reset Path Control by Wake-up Timer. In
addition to these, CIC61508 will monitor the communication between the CIC61508 and the Host.
User's Manual
11 Release v2.2, Nov 2012
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CIC61508.PDF ] | |
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