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PDF R2A20134SP Data sheet ( Hoja de datos )
| Número de pieza | R2A20134SP | |
| Descripción | LED Lighting Power Controller | |
| Fabricantes | Renesas Technology | |
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Preliminary Datasheet
R2A20134SP
LED Lighting Power Controller
R03DS0033EJ0200
Rev.2.00
Jun 03, 2011
Description
R2A20134SP is a LED lighting controller IC.
Control method is selectable for each system demand, fixed frequency or zero current detection mode.
High accuracy LED current feed-back system makes more efficient LED performance.
Critical Conduction Mode PFC control realizes high power factor and zero current switching.
And Peak Current Mode makes it possible to reduce external parts and realize low system cost.
Features
Absolute Maximum Ratings
Supply voltage Vcc: 24 V
Operating junction temperature Tjopr: –40 to +150°C
Electrical characteristics
UVLO operation start voltage VH: 12 V 0.8 V
UVLO operation shutdown voltage VL: 9.2 V 0.7 V
UVLO hysteresis voltage Hysuvl: 2.8 V 0.7 V
Functions
Selectable for each targeted system,
1. Zero current detection mode (When Rrt is connected by GND)
2. Fixed frequency mode (When Rrt is connected by Vref)
Adjustable for Switching frequency (When Rrt is connected by Vref)
Overcurrent protection
Package lineup: Pb-free SOP-8 (JEDEC)
Ordering Information
Part No.
R2A20134SP#W5
Package Name
—
Package Code
PRSP0008DJ-A
Package
Abbreviation
SP
Taping Abbreviation
(Quantity)
W (2,500 pcs/reel)
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 1 of 10
1 page  
R2A20134SP
Preliminary
Electrical Characteristics
(Ta = 25°C, VCC = 15 V, CS = 0 V, FB = COMP, RRT = 200 k)
Item
Symbol
Min Typ Max Unit
Test Conditions
Supply
UVLO turn-on threshold Vuvlh
11.2 12 12.8
V
UVLO turn-off threshold Vuvll
8.5 9.2 9.9
V
UVLO hysteresis
Hysuvl
2.1 2.8 3.5
V
Standby current
Istby
— 130 250
A VCC = Vuvlh – 0.2 V
Operating current
Icc
— 2.2 3.3
mA
VREF
Reference voltage
Temperature stability
Vref
dVref
4.945 5.020 5.095 V Isource = 0 mA
— 80 — ppm/°C Tj = –40 to 150°C *1
Line regulation
Vref-line
— 5 20 mV Isource = 0 mA
Vcc = 10 V to 24 V
Load regulation
Vref-load
— 5 20 mV Isource = 0 mA to –5 mA
Error
amplifier
Feedback voltage
Input bias current
Vfb
Ifb
0.587 0.605 0.623
V
–0.75 –0.25 –0.1
A Measured pin: FB
Open loop gain
Av
— 63 —
dB
Upper clamp voltage
Vclamp_comp 3.85 4.10 4.30
V FB = 0.3 V
COMP: Open
Low voltage
Vl-comp
— 0.1 0.3
V FB = 0.9 V
COMP: Open
Source current
Isrc-comp
–13 –9.5 –6
A FB = 0.3 V
COMP: 2.5 V
Sink current
Isnk-comp
6 9.5 13
A FB = 0.9 V
COMP: 2.5 V
Transconductance
gm
25 45 70
s FB = 0.55 V 0.65 V
COMP: 2.5 V
RT
RAMP offset voltage
Voffset_ramp — 1.0 —
V
RAMP amplitude
dVramp
2.9 3.1 3.3
V *2
RT voltage1
V-rt1
1.9 2.0 2.1
V RT-GND: 200 k
RT voltage2
V-rt2
2.9 3.0 3.1
V RT-Vref: 200 k
Zero
current
detector
ZCD threshold voltage
Input bias current
Vzcd
Ics
7 13 19
–85 –53 –25
mV
A Vcs = 13 mV
Restart Restart time delay
Tstart
45 75 140
s FB = 0.3 V, COMP = 2.5 V
Notes: *1 Design spec
*2 dVramp = Vclamp_comp – Voff_ramp
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 5 of 10
5 Page 
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