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A3S28D40JTP Schematic ( PDF Datasheet ) - Zentel

Teilenummer A3S28D40JTP
Beschreibung 128M Double Data Rate Synchronous DRAM
Hersteller Zentel
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Gesamt 30 Seiten
A3S28D40JTP Datasheet, Funktion
A3S28D40JTP
128M Double Data Rate Synchronous DRAM
128Mb DDR SDRAM Specification
A3S28D40JTP
Zentel Electronics Corp.
Revision 1.0
Oct., 2013






A3S28D40JTP Datasheet, Funktion
A3S28D40JTP
128M Double Data Rate Synchronous DRAM
BASIC FUNCTIONS
The A3S28D40JTP provides basic functions, Active, Read / Write, Precharge, and Auto / Self
Refresh, Mode Register Set, Burst Terminate. Each command is defined by control signals of
/RAS, /CAS and /WE at CLK rising edge. In addition to 3 signals, /CS , CKE and A10 are used as
chip select, refresh option, and precharge option, respectively. To know the detailed definition of
commands, please see the command truth table.
/CLK
CLK
/CS
Chip Select : L=select, H=deselect
/RAS
Command
/CAS
Command
define basic commands
/WE Command
CKE
Refresh option @ Refresh command
A10 Precharge option @ Precharge or Read/Write command
Deselect (DESEL) [/CS = H, /RAS = X, /CAS = X, /WE = X]
DESEL command prevents new commands from being executed. Operations already in progress
are not affected.
No Operation (NOP) [/CS = L, /RAS = H, /CAS = H, /WE = H]
NOP command prevents unwanted commands from being registered. NOP command is effectively
the same as DESEL command. Operations already in progress are not affected.
Mode Register Set (MRS) [/CS = L, /RAS = L, /CAS = L, /WE = L]
MRS command loads the mode registers via inputs BA0,1, and A0-A11. The MRS command can only
be issued when all banks are idle and no bursts are in progress, and a subsequent executable command
cannot be issued until tMRD is met.
Active (ACT) [/CS = L, /RAS = L, /CAS = H, /WE = H]
ACT command activates a row in an idle bank indicated by BA.
Read (READ) [/CS = L, /RAS = H, /CAS = L, /WE = H]
READ command starts burst read from the active bank indicated by BA. First output data appears after
CAS latency. When A10 = H at this command, the bank is deactivated after the burst read (Read with
Auto Precharge, READA).
Write (WRITE) [/CS = L, /RAS = H, /CAS = L, /WE = L]
WRITE command starts burst write to the active bank indicated by BA. Total data length to be written
is set by burst length. When A10 = H at this command, the bank is deactivated after the burst write
(Write with Auto Precharge, WRITEA).
Revision 1.0
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Oct., 2013

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A3S28D40JTP pdf, datenblatt
A3S28D40JTP
128M Double Data Rate Synchronous DRAM
FUNCTION TRUTH TABLE (continued)
Current State /CS /RAS /CAS /WE Address
Command
Action
REFRESHING H X X X X
DESEL
NOP (Idle after tRC)
L H H HX
NOP
NOP (Idle after tRC)
L H H L BA
TERM
ILLEGAL
L H L X BA, CA, A10 READ / WRITE ILLEGAL
L L H H BA, RA
ACT
ILLEGAL
L L H L BA, A10
PRE / PREA
ILLEGAL
L L L HX
REFA
ILLEGAL
LL
L L Op-Code, Mode- MRS
Add
ILLEGAL
MODE
HX
REGISTER L H
SETTING L H
X XX
H HX
H L BA
DESEL
NOP
TERM
NOP (Row Active after tRSC)
NOP (Row Active after tRSC)
ILLEGAL
L H L X BA, CA, A10 READ / WRITE ILLEGAL
L L H H BA, RA
ACT
ILLEGAL
L L H L BA, A10
PRE / PREA
ILLEGAL
L L L HX
REFA
ILLEGAL
LL
Op-Code, Mode-
L L Add
MRS
ILLEGAL
ABBREVIATIONS:
H=HIGH Level, L=LOW Level, X=Don't Care
BA=Bank Address, RA=Row Address, CA=Column Address, NOP=No Operation
Notes
NOTES:
1. All entries assume that CKE was HIGH during the preceding clock cycle and the current clock cycle.
2. ILLEGAL to bank in specified state; function may be legal in the bank indicated by BA, depending on the state of
that bank.
3. Must satisfy bus contention, bus turn around, write recovery requirements.
4. NOP to bank precharging or in idle state. May precharge bank indicated by BA.
5. ILLEGAL if any bank is not idle.
6. Concurrent Auto Precharge supported;
A Read with Auto Precharge or a Write with Auto Precharge may be followed by any command to the other banks,
as long as that command does not interrupt the read or write data transfer, and all other related limitations apply (e.g.,
contention between read data and write data must be avoided). The minimum delay from a Read with Auto Precharge
or a Write with Auto Precharge to a command to a different bank is summarized below.
From command
Write w/AP
Read w/AP
To command (different bank)
Read or Read w/AP
Write or Write w/AP
Precharge or Active
Read or Read w/AP
Write or Write w/AP
Precharge or Active
Minimum delay
1 + (BL/2) + tWTR
BL/2
1
BL/2
CL(round up) + (BL/2)
1
7. ILLEGAL = Device operation and/or data-integrity are not guaranteed.
Units
tCK
tCK
tCK
tCK
tCK
tCK
Revision 1.0
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