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PDF GC9302 Data sheet ( Hoja de datos )
| Número de pieza | GC9302 | |
| Descripción | a-Si TFT LCD Single Chip Driver | |
| Fabricantes | GALAXYCORE | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de GC9302 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
Specification
Preliminary
Version: V1.00
Document No.: GC9302DS_V100.pdf
Page 1 of 222
1 page  
6.4.16. SET_GAMMA11(FBh)........................................................................................... 207
6.4.17. SET_GAMMA12(FCh) .......................................................................................... 208
6.4.18. Power control 3 (FDh) ............................................................................................ 194
6.4.19. Power control 4 (FFh) ............................................................................................. 196
7. Application...................................................................................................................................... 209
8. Electrical Characteristics................................................................................................................. 211
8.1 Absolute Maximum Ratings ................................................................................................. 211
8.2 DC Characteristics ................................................................................................................ 212
8.3 AC Characteristics ................................................................................................................ 214
8.3.1 Display Parallel 18/16/9/8-bit Interface Timing Characteristics (8080-Ⅰ) ............... 214
8.3.2 Display Parallel 18/16/9/8-bit Interface Timing Characteristics (8080-Ⅱ) ............... 216
8.3.3 Display Serial Interface Timing Characteristics (3-line SPI system) ......................... 219
8.3.4 Display Serial Interface Timing Characteristics (4-line SPI system) ......................... 220
8.3.5 Parallel 18/16/6-bit RGB Interface Timing Characteristics ....................................... 221
9. Revision History ............................................................................................................................. 222
Page 5 of 222
5 Page 
This pin is used to select "Data or Command" in the parallel interface
D/CX
(SCL)
When DCX='1', data is selected.
MCU
I When DCX='0', command is selected.
(VDDI/VSS)
This pin is used serial interface clock in 3-wire 9-bit / 4-wire 8-bit serial data interface.
If not used, this pin should be connected to VDDI or VSS.
RDX
8080-I/8080-II system (RDX):Serves as a read signal and MCU read data at the rising
MCU
I edge.
(VDDI/VSS)
Fix to VDDI level when not in use
8080-I/8080-II system (WRX): Serves ad a write signal and writes data at the rising
WRX
(D/CX)
MCU
edge.
I
(VDDI/VSS) 4-line system (D/CX): Serves as command or parameter select.
Fix to VDDI level when not in use.
D[17:0]
MCU
18-bit parallel bi-directional data bus for MCU system and RGB interface mode
I/O
(VDDI/VSS) Fix to VSS level when not in use
When IM[3]:Low, Serial in/out signal.
MCU
When IM[3]:High, Serial input signal.
SDI/SDA I/O
(VDDI/VSS) The data is applied on the rising edge of the SCL signal.
If not used, fix this pin at VDDI or VSS.
SDO
Serial output signal.
MCU
O The data is outputted on the falling edge of the SCL signal.
(VDDI/VSS)
If not used, open this pin
MCU
Tearing effect output pin to synchronize MPU to frame writing, activated by S/W
TE O
(VDDI/VSS) command. When this pin is not activated, this pin is low. If not used, open this pin.
MCU
Dot clock signal for RGB interface operation.
DOTCLK I
(VDDI/VSS) Fix to VDDI or VSS level when not in use.
MCU
Frame synchronizing signal for RGB interface operation.
VSYNC
I
(VDDI/VSS) Fix to VDDI or VSS level when not in use.
MCU
Line synchronizing signal for RGB interface operation.
HSYNC
I
(VDDI/VSS) Fix to VDDI or VSS level when not in use.
MCU
Data enable signal for RGB interface operation.
DE I
(VDDI/VSS) Fix to VDDI or VSS level when not in use.
Note.
1. If CSX is connected to VSS in Parallel interface mode, there will be no abnormal visible effect to the display module. Also there will be no restriction
on using the Parallel Read/Write protocols, Power On/Off Sequences or other functions. Furthermore there will be no influence to the Power
Consumption of the display module.
2. When CSX=’1’, there is no influence to the parallel and serial interface.
Page 11 of 222
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet GC9302.PDF ] | |
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