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71M6545HT Schematic ( Datenblatt PDF ) - Maxim

Teilenummer 71M6545HT
Beschreibung Energy Meter ICs
Hersteller Maxim
Logo Maxim Logo 



Gesamt 30 Seiten
		
71M6545HT Datasheet, Funktion
71M6545T/71M6545HT
EVALUATION KIT AVAILABLE
Energy Meter ICs
General Description
The 71M6545T/71M6545HT metrology processors are
based on Maxim Integrated’s 4th-generation metering
architecture supporting the 71M6xxx series of isolated
current sensing products that offer drastic reduction in
component count, immunity to magnetic tampering, and
unparalleled reliability. The 71M6545T/71M6545HT inte-
grate our Single Converter Technology® with a 22-bit
delta sigma ADC, a customizable 32-bit computation
engine (CE) for core metrology functions, as well as a
user-programmable 8051-compatible application proces-
sor (MPU) core with 64KB flash and 5KB RAM.
An external host processor can access metrology func-
tions directly through the SPI interface, or alternatively
through the embedded MPU core in applications requir-
ing metrology data capture, storage, and preprocessing
within the metrology subsystem. In addition, the devices
integrate an RTC, DIO, and UART. A complete array of
ICE and development tools, programming libraries, and
reference designs enable rapid development and certi-
fication of meters that meet all ANSI and IEC electricity
metering standards worldwide.
The 71M6545T/71M6545HT operate over the industrial tem-
perature range and come in a 64-pin lead(Pb)-free package.
Applications
● Three-Phase Residential, Commercial, and Industrial
Energy Meters
Ordering Information and Typical Operating Circuit appear
at end of data sheet.
Benefit and Features
● SoC Integration and Unique Isolation Technique
Reduces BOM Cost Without Sacrificing Performance
• 0.1% Typical Accuracy Over 2000:1 Current
Range
• Exceeds IEC 62053/ANSI C12.20 Standards
• Four-Quadrant Metering
• 46-64Hz Line Frequency Range with the Same
Calibration
• Phase Compensation (±10º)
• Independent 32-Bit Compute Engine
• 64KB Flash, 5KB RAM
• Built-In Flash Security
• SPI Interface to Host with Flash Program
Capability
• Up to Four Pulse Outputs with Pulse Count
• 8-Bit MPU (80515), Up to 5 MIPS (Optional Use)
• Full-Speed MPU Clock in Brownout Mode
• Up to 29 Multifunction DIO Pins
• Hardware Watchdog Timer (WDT)
• UART for AMR or Other Communication Duties
• I2C/MICROWIRE® EEPROM Interface
● Innovative Isolation Technology (Requires
Companion 71M6xxx Sensor, also from Maxim
Integrated) Eliminates Current Transformers
• Four Current Sensor Inputs with Selectable
Differential Mode
• Selectable Gain of 1 or 8 for One Current Input to
Support Neutral Current Shunt
• High-Speed Wh/VARh Pulse Outputs with
Programmable Width
● Digital Temperature Compensation Improves System
Performance
• Metrology Compensation
• Accurate RTC for TOU Functions with Automatic
Temperature Compensation for Crystal in All
Power Modes
● Power Management Extends Battery Life During
Power Outages
• Two Battery-Backup Modes:
Brownout Mode (BRN)
Sleep Mode (SLP)
• Wake-Up on Pin Events and Wake-On Timer
• 1µA in Sleep Mode
Single Converter Technology is a registered trademark of
Maxim Integrated Products, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
19-6721; Rev 4; 1/15






71M6545HT Datasheet, Funktion
71M6545T/71M6545HT
Energy Meter ICs
LIST OF TABLES
Table 1. ADC Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 2. Inputs Selected in Multiplexer Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 3. CKMPU Clock Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 4. Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 5. Internal Data Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 6. Special Function Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 7. Generic 80515 SFRs: Location and Reset Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 8. Timers/Counters Mode Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 9. External MPU Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 10. I/O RAM Locations in Numerical Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 11. I/O RAM Locations in Alphabetical Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 12. Info Page Trim Fuses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 13. Trim Fuse Bit Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 14. Power Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 15. CE Raw Data Access Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 16. CE Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 17. CE Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 18. Sag Threshold and Gain Adjustment Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 19. CE Transfer Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 20. CE Pulse Generation Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 21. Other CE Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 22. CE Calibration Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
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71M6545HT pdf, datenblatt
71M6545T/71M6545HT
Energy Meter ICs
Electrical Characteristics (continued)
(Limits are production tested at TA = +25ºC. Limits over the operating temperature range and relevant supply voltage range are guar-
anteed by design and characterization.)
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
Clock Frequency (as a Multiple
of CPU Frequency)
2.0 MHz/MHz
Space Between SPI
Transactions
4.5
CPU
Cycles
EEPROM INTERFACE
I2C SCL Frequency
MPU clock = 4.9MHz, using interrupts
MPU clock = 4.9MHz, bit-banging DIO2-DIO3
310
kHz
100
3-Wire Write Clock Frequency
MPU clock = 4.9MHz, PLL_FAST = 0
MPU clock = 4.9MHz, PLL_FAST = 1
160
kHz
490
RESET
Reset Pulse Width
(Note 1)
5 µs
Reset Pulse Fall Time
(Note 1)
1 µs
INTERNAL CALENDAR
Year Date Range
2000
2255 Years
Recommended External Components
NAME
C1
C2
CSYS
CVDD
XTAL
FROM
VV3P3A
VV3P3D
VV3P3SYS
VDD
XIN
TO
GNDA
GNDD
GNDD
GNDD
XOUT
FUNCTION
Bypass capacitor for 3.3V supply
Bypass capacitor for 3.3V output
Bypass capacitor for VV3P3SYS
Bypass capacitor for VDD
32.768 kHz crystal; electrically similar to ECS
.327-12.5-17X, Vishay XT26T or Suntsu SCP6–
32.768kHz TR (load capacitance 12.5pF)
VALUE
≥ 0.1 ±20%
0.1 ±20%
≥ 1.0 ±30%
0.1 ±20%
32.768
UNITS
µF
µF
µF
µF
kHz
CXS
(Note 2)
CXL
(Note 2)
XIN
XOUT
GNDA
GNDA
Load capacitor values for crystal depend on crystal
specifications and board parasitics. Nominal
values are based on 3pF allowance for the sum
of board capacitance and chip capacitance.
22 ±10%
22 ±10%
pF
pF
Note 1: Parameter not tested in production, guaranteed by design to six-sigma.
Note 2: If the capacitor values of CXS = 15pF and CXL = 10pF have already been installed, then changing the CXL value to 33pF
and leaving CXS = 15pF would minimize rework.
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