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PDF CAV93C46 Data sheet ( Hoja de datos )
| Número de pieza | CAV93C46 | |
| Descripción | EEPROM | |
| Fabricantes | ON Semiconductor | |
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CAV93C46
1-Kb Microwire Serial
EEPROM
Description
The CAV93C46 is a 1−Kb Serial EEPROM memory device which is
configured as either 64 registers of 16 bits (ORG pin at VCC) or 128
registers of 8 bits (ORG pin at GND). Each register can be written (or
read) serially by using the DI (or DO) pin. The CAV93C46 features a
self−timed internal write with auto−clear. On−chip Power−On Reset
circuit protects the internal logic against powering up in the wrong
state.
Features
• Automotive Temperature Grade 1 (−40°C to +125°C)
• High Speed Operation: 2 MHz
• 2.5 V to 5.5 V Supply Voltage Range
• Selectable x8 or x16 Memory Organization
• Self−Timed Write Cycle with Auto−Clear
• Sequential Read
• Software Write Protection
• Power−up Inadvertant Write Protection
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• 8−pin SOIC and TSSOP Packages
• This Device is Pb−Free, Halogen Free/BFR Free and RoHS
Compliant†
VCC
ORG
CS
SK
DI
CAV93C46
DO
GND
Figure 1. Functional Symbol
†For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
TSSOP−8
Y SUFFIX
CASE 948AL
SOIC−8
V SUFFIX
CASE 751BD
PIN CONFIGURATIONS
CS 1
SK
DI
DO
VCC
NC
ORG
GND
SOIC (V), TSSOP (Y)
(Top View)
PIN FUNCTION
Pin Name
CS
SK
DI
DO
VCC
GND
ORG
NC
Function
Chip Select
Clock Input
Serial Data Input
Serial Data Output
Power Supply
Ground
Memory Organization
No Connection
Note: When the ORG pin is connected to VCC, the
x16 organization is selected. When it is connected
to ground, the x8 organization is selected. If the
ORG pin is left unconnected, then an internal pullup
device will select the x16 organization.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
July, 2013 − Rev. 0
1
Publication Order Number:
CAV93C46/D
1 page  
SK
DI
CS
DO
SK
CS
DI
DO
SK
CS
DI
CAV93C46
tSKHI
tSKLOW
tCSH
tCSS
tDIS
VALID
VALID
tDIH
tDIS tPD0, tPD1
DATA VALID
Figure 2. Synchronous Data Timing
tCSMIN
11
AN AN−1
0
HIGH−Z
tPD0
A0
Don’t Care
Dummy 0
D15 . . . D0
or
D7 . . . D0
Address + 1
D15 . . . D0
or
D7 . . . D0
Address + 2
D15 . . . D0
or
D7 . . . D0
Address + n
D15 . . .
or
D7 . . .
Figure 3. Read Instruction Timing
STANDBY
1 00
*
* ENABLE = 11
DISABLE = 00
Figure 4. EWEN/EWDS Instruction Timing
http://onsemi.com
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