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Número de pieza | AX88772 | |
Descripción | USB to 10/100 Fast Ethernet/HomePNA Controller | |
Fabricantes | ASIX | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de AX88772 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! AX88772
USB to 10/100 Fast Ethernet/HomePNA Controller
Features
• Single chip USB to 10/100 Fast Ethernet and
HomePNA and HomePlug Network Controller
• Integrates on-chip 10/100Mbps Fast Ethernet PHY
• USB specification 1.1 and 2.0 compliant
• Supports USB Full and High Speed modes with Bus
power capability
• Supports 4 endpoints on USB interface
• High performance packet transfer rate over USB
bus using proprietary burst transfer mechanism
(submitted for US patent application)
• IEEE 802.3 10BASE-T and 100BASE-TX
compatible
• Embedded 20KB SRAM for RX packet buffering
and 8KB SRAM for TX packet buffering
• Supports both full-duplex and half-duplex
operation in Fast Ethernet
• Provides optional MII interface for Ethernet PHY
and HomePNA/ HomePlug PHY interface
Document No: AX88772_11/4/24/07
• Supports Suspend mode and Remote Wakeup via
Link-up, Magic packet, or external pin
• Optional PHY power down during Suspend mode
• Supports 256/512 bytes (93c56/93c66) of serial
EEPROM (for storing USB Descriptors)
• Supports automatic loading of Ethernet ID, USB
Descriptors and Adapter Configuration from
EEPROM after power-on initialization
• External PHY loop-back diagnostic capability
• Integrates on-chip 3.3V to 2.5V voltage regulator
and requires only single power supply: 3.3V
• Small form factor with 128-pin LQFP package
• 12MHz and 25Mhz clock input from either crystal
or oscillator source
• Operating temperature range: 0°C to 70°C.
*IEEE is a registered trademark of the Institute of Electrical and
Electronic Engineers, Inc.
*All other trademarks and registered trademark are the property of their
respective holders.
Product Description
The AX88772 USB to 10/100 Fast Ethernet/HomePNA/HomePlug controller is a high performance and highly integrated
ASIC with embedded 28KB SRAM for packet buffering. It enables low cost and affordable Fast Ethernet network
connection to desktop, notebook PC, and embedded system using popular USB ports. It has an USB interface to
communicate with USB host controller and is compliant with USB specification V1.1 and V2.0. It implements
10/100Mbps Ethernet LAN function based on IEEE802.3, and IEEE802.3u standards or HomePNA standard. It
integrates an on-chip 10/100Mbps Ethernet PHY to simplify system design and provides an optional media-independent
interface (MII) for implementing Fast Ethernet and HomePNA functions.
System Block Diagram
RJ45
Magnetic
RJ45
Magnetic
10/100 PHY (FX)
RJ11
Magnetic
Home LAN PHY
AX88772
EEPROM
USB I/F
Always contact ASIX for possible updates before starting a design.
This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without notice. No
liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
ASIX ELECTRONICS CORPORATION
4F, NO.8, Hsin Ann Rd., Science-Based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.
TEL: 886-3-579-9500
FAX: 886-3-579-9558
Released Date: 4/24/2007
http://www.asix.com.tw
1 page AX88772
USB to 10/100 Fast Ethernet/HomePNA Controller
1.3 AX88772 Pinout Diagram
The AX88772 is housed in the 128-pin LQFP package.
VDD3
GND
VDDK
GND
DB4
TX_CLK
NC
RX_CLK
RX_DV
RX_ER
RXD0
RXD1
RXD2
RXD3
DB3
DB2
DB1
DB0
CRS
COL
MDINT
VDDK
GND
MDIO
MDC
PHYRST_N
VDD2
GND
LED
USB_SPEED_LED
GND
VDD3
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
97 64
98 63
99 62
100 61
101 60
102 59
103 58
104 57
105 56
106 55
107 54
108 53
109 52
110 51
111
ASIX112
113
114 AX88772
115
50
49
48
47
46
116 45
117 44
118 43
119 42
120 41
121 40
122 39
123 38
124 37
125 36
126 35
127 34
128 33
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
AVDDK
AGND
TXOP
TXON
AGND
XXOINU2T5M25M
XIONU2T52M5M
AVDDK
IBREF
AGND
AGND
AVDDK
RXIP
RXIN
AGND
AVDDK
NC
NC
CLKSEL
CLK60EXT
SCAN_ENABLE
SCAN_TEST
HS_TEST_MODE
VDD3
GND
AVDD3
AGND
AVDD3
DPRS
DMRS
RPU
AGND
Figure 2: AX88772 Pinout Diagram
5 ASIX ELECTRONICS CORPORATION
5 Page AX88772
USB to 10/100 Fast Ethernet/HomePNA Controller
communicating with multiple PHY devices at the same time by identifying the managed PHY with 5-bit, unique Phy ID.
The Phy ID of the embedded 10/100 Ethernet PHY is being pre-assigned to “1_0000”.
Figure 4 shows the internal control mux for the station management interface. When doing read, the “mdin” signal will be
driven from 10/100 Ethernet PHY only if Phy ID matches with “1_0000”, otherwise, it will always be driven from
external MDIO pin of the ASIC.
10/100 Ethernet
PHY
Phy ID = 1_0000
mdout
STA
mdin
MDC
MDIO
Figure 4: Internal Control Mux for Station Management Interface
3.5 Memory Arbiter
The memory arbiter block is responsible for storing received MAC frames into on-chip SRAM (packet buffer) and then
forwarding to USB bus upon request from USB host via bulk in transfer. It also monitors packet buffer usage in
full-duplex mode for triggering PAUSE frame transmission out on TX direction. The memory arbiter block is also
responsible for storing MAC frames received from USB host via bulk out transfer and waiting to be transmitted out
towards Ethernet network.
3.6 USB to Ethernet Bridge
The USB to Ethernet bridge block is responsible for converting Ethernet MAC frame into USB packets or vice-versa.
This block supports proprietary burst transfer mechanism (submitted for US patent application) to offload software
burden and to offer very high packet transfer throughput over USB bus.
3.7 Serial EEPROM Loader
The serial EEPROM loader is responsible for reading configuration data automatically from external serial EEPROM
after power-on reset.
3.8 General Purpose I/O
There are 3 general purpose I/O pins provided by this ASIC.
11 ASIX ELECTRONICS CORPORATION
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet AX88772.PDF ] |
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