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AOZ1268QI-01 Schematic ( Datenblatt PDF ) - Alpha & Omega Semiconductors

Teilenummer AOZ1268QI-01
Beschreibung 28V/10A Synchronous EZBuck Regulator
Hersteller Alpha & Omega Semiconductors
Logo Alpha & Omega Semiconductors Logo 



Gesamt 15 Seiten
		
AOZ1268QI-01 Datasheet, Funktion
AOZ1268QI-01
28V/10A Synchronous EZBuckTM Regulator
General Description
The AOZ1268-01 is a high-efficiency, easy-to-use DC/DC
synchronous buck regulator that operates up to 28V.
The device is capable of supplying 10A of continuous
output current with an output voltage adjustable down to
0.8V (±1.0%).
The AOZ1268-01 integrates an internal linear regulator
to generate 5.3V VCC from input. If input voltage is lower
than 5.3V, the linear regulator operates at low drop-
output mode, which allows the VCC voltage is equal to
input voltage minus the drop-output voltage of the
internal linear regulator.
A proprietary constant on-time PWM control with input
feed-forward results in ultra-fast transient response while
maintaining relatively constant switching frequency over
the entire input voltage range. The switching frequency
can be externally programmed up to 1MHz.
The device features multiple protection functions such as
VCC under-voltage lockout, cycle-by-cycle current limit,
output over-voltage protection, short-circuit protection, as
well as thermal shutdown.
The AOZ1268-01 is available in a 4mm x 4mm QFN-23L
package and is rated over a -40°C to +85°C ambient
temperature range.
Features
Wide input voltage range
6.5V to 28V
10A continuous output current
Output voltage adjustable down to 0.8V (±1.0%)
Low RDS(ON) internal NFETs
28mhigh-side
8mlow-side
Constant On-Time with input feed-forward
Programmable frequency up to 1MHz
Selectable PFM light load operation
Ceramic capacitor stable
Adjustable soft start
Power Good output
Integrated bootstrap diode
Cycle-by-cycle current limit
Short-circuit protection
Thermal shutdown
Thermally enhanced 4mm x 4mm QFN-23L package
Applications
Portable computers
Compact desktop PCs
Servers
Graphics cards
Set-top boxes
LCD TVs
Cable modems
Point-of-load DC/DC converters
Telecom/Networking/Datacom equipment
Rev. 2.0 July 2014
www.aosmd.com
Page 1 of 15






AOZ1268QI-01 Datasheet, Funktion
AOZ1268QI-01
Functional Block Diagram
BST
IN
PGood
LDO
VCC
EN
Reference
& Bias
SS
ISENCE
(AC)
FB
FB Decode
UVLO
0.8V
Error Comp
ILIM Comp
ILIM_VALLEY
ISENSE
TOFF_MIN
Q
Timer
SQ
R
OTP
PFM
TON
TON
Q
Timer
TON
Generator
Vcc
Light Load
Comp
EN
PG Logic
LX
Current
Information
Processing
ISENSE
ISENSE (AC)
Light Load ISENSE
Threshold
PGND
AGND
Rev. 2.0 July 2014
www.aosmd.com
Page 6 of 15

6 Page







AOZ1268QI-01 pdf, datenblatt
AOZ1268QI-01
Layout Considerations
Several layout tips are listed below for the best electric
and thermal performance.
1. The LX pins and pad are connected to internal low
side switch drain. They are low resistance thermal
conduction path and most noisy switching node.
Connect a large copper plane to LX pin to help
thermal dissipation.
2. The IN pins and pad are connected to internal high
side switch drain. They are also low resistance
thermal conduction path. Connect a large copper
plane to IN pins to help thermal dissipation.
3. Input capacitors should be connected to the IN pin
and the PGND pin as close as possible to reduce the
switching spikes.
4. Decoupling capacitor CVCC should be connected to
VCC and AGND as close as possible.
5. Voltage divider R1 and R2 should be placed as close
as possible to FB and AGND.
6. RTON should be put on PCB reverse side of feedback
network or away from FB pin and FB feedback resis-
tors to avoid unwanted touch to short Ton pin and FB
together to ground to cause improperly operation.
7. A ground plane is preferred; Pin 19 (PGND) must be
connected to the ground plane through via.
8. Keep sensitive signal traces such as feedback trace
far away from the LX pins.
9. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
9RXW
9LQ
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9RXW
Rev. 2.0 July 2014
www.aosmd.com
Page 12 of 15

12 Page


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