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EM78452 Schematic ( PDF Datasheet ) - ELAN Microelectronics

Teilenummer EM78452
Beschreibung 8-BIT MICROCONTROLLER
Hersteller ELAN Microelectronics
Logo ELAN Microelectronics Logo 




Gesamt 30 Seiten
EM78452 Datasheet, Funktion
EM78452
8-Bit
Microcontroller
Product
Specification
DOC. VERSION 1.0
ELAN MICROELECTRONICS CORP.
October 2007






EM78452 Datasheet, Funktion
EM78452
8-Bit Microcontroller
3 Pin Assignment
Vss
/IN T
DATA
CLK
P90
P 91/SR D Y
P92/S D I
P 93/S D O
P 94/SC K
P 95//S S
P50
P51
P52
P53
P54
P55
P56
P57
P80
P81
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 OSCO
39 R-O SC I
38 VDD
37 P 70//R E S E T
36 P71
35 P72
34 P67
33 P66
32 P65
31 P64
30 P63
29 P62
28 P61
27 P60
26 P87
25 P86
24 P85
23 P84
P70//RESET
NC
NC
NC
VDD
R-OSCI
OSCO
Vss
/INT
DATA
CLK
33 32 31 30 29 28 27
34
35
26 25 24 23
22
21
36 20
37 19
38
39 EM78452AQ
40
18
17
16
41 15
42 14
43 13
44
1234567
12
8 9 10 11
P86
P85
P84
P83
P82
NC
P81
P80
P57
P56
P55
22 P83
21 P82
Fig. 3-1a 40-pin DIP EM78452P
Fig. 3-1b 44-pin QFP EM78452AQ
Fig. 3-1 Pin Assignment
2 Product Specification (V1.0) 10.18.2007
(This specification is subject to change without further notice)

6 Page









EM78452 pdf, datenblatt
EM78452
8-Bit Microcontroller
5.1.8 RA (SPIRB: SPI Read Buffer)
Address Name Bit 7
0X0A SPIRB/RA SRB7
Bit 6
SRB6
Bit 5
SRB5
Bit 4
SRB4
Bit 3
SRB3
Bit 2
SRB2
SRB7~SRB0 are the 8-bit data when transmission is completed by SPI.
Bit 1
SRB1
5.1.9 RB (SPIWB: SPI Write Buffer)
Address Name Bit 7 Bit 6 Bit 5
0x0B SPIWB/RB SWB7 SWB6 SWB5
Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
SWB4 SWB3 SWB2 SWB1 SWB0
SWB7~SWB0 are the 8-bit data that are waiting for transmission by SPI.
5.1.10 RC (SPIS: SPI Status Register)
Address Name Bit 7
0x0C SPIS/RC DORD
Bit 6
TD1
Bit 5 Bit 4
TD0 TM1IF
Bit 3
OD3
Bit 2
OD4
Bit 1
Bit 0
RBF
Bit 7 (DORD): Data transmission order.
0 : Shift left (MSB first)
1 : Shift right (LSB first)
Bit 6~Bit 5: SDO Status output Delay times Options
TD1 TD0
00
01
10
11
Delay Time
8 CLK
16 CLK
24 CLK
32 CLK
Bit 4 (T1ROS): Timer 1 Read Out Buffer Select Bit
0 : Read Value from Timer 1 Preset Register
1 : Read Value from Timer 1 Counter Register
Bit 3 (OD3): Open-Drain Control bit
0 : Open-drain disable for SDO
1 : Open-drain enable for SDO
Bit 2 (OD4): Open-Drain Control bit
0 : Open-drain disable for SCK
1 : Open-drain enable for SCK
Bit 1:
not used, read as “0”
Bit 0 (RBF): Read Buffer Full flag
0 : Receiving not completed, and SPIRB has not fully exchanged.
1 : Receiving completed; SPIRB is fully exchanged.
8 Product Specification (V1.0) 10.18.2007
(This specification is subject to change without further notice)

12 Page





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