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Teilenummer | A1227 |
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Beschreibung | Hall Effect Latch for High Temperature Operation | |
Hersteller | Allegro MicroSystems | |
Logo | ||
Gesamt 13 Seiten A1225, A1227, and A1229
Hall Effect Latch for High Temperature Operation
Features and Benefits
▪ Symmetrical switchpoints
▪ Superior temperature stability
▪ Operation from unregulated supply
▪ Open-drain 25 mA output
▪ Reverse Battery protection
▪ Activate with small, commercially available
permanent magnets
▪ Solid-state reliability
▪ Small size
▪ Resistant to physical stress
▪ Enhanced ESD structures result in 8 kV HBM ESD
performance without external protection components
▪ Internal protection circuits enable 40 V load dump
compliance without external protection components
Packages:
3-pin SIP
(suffix UA)
Not to scale
3-pin SOT89
(suffix LT)
Description
These Hall-effect latches are extremely temperature-stable
and stress resistant sensor ICs especially suited for operation
over extended temperature ranges to 150°C. Superior high-
temperature performance is made possible through a novel
Schmitt trigger circuit that maintains operate and release
point symmetry by compensating for temperature changes
in the Hall element. Additionally, internal compensation
provides magnetic switchpoints that become more sensitive
with temperature, hence offsetting the usual degradation of
the magnetic field with temperature. The symmetry capability
makes these devices ideal for use in pulse-counting applications
where duty cycle is an important parameter. The three basic
devices (A1225, A1227, and A1229) are identical except for
magnetic switchpoints.
Each device includes on a single silicon chip a voltage regulator,
Hall-voltage generator, temperature compensation circuit,
signal amplifier, Schmitt trigger, and a buffered open-drain
output to sink up to 25 mA. The on-board regulator permits
operation with supply voltages of 3.8 to 24 V.
The first character of the part number suffix determines the
device operating temperature range. Suffix L is for –40°C to
150°C. Two package styles provide a magnetically optimized
package for most applications. Suffix LT is a miniature SOT89/
TO-243AAtransistor package for surface-mount applications,
suffix UAis a three-lead ultra-mini-SIP. Both packages are lead
(Pb) free with 100% matte tin leadframe plating.
Functional Block Diagram
VCC
Regulator
Clock / Logic
To All Subcircuits
VOUT
A1225-DS, Rev. 1
AMP
Anti-aliasing
LP-Filter
Tuned Filter
GND
A1225, A1227
and A1229
Hall Effect Latch for High Temperature Operation
A1225 Magnetic Characteristics
Operate Point versus Ambient Temperature
300
280
260
240
220
200
VCC (V)
3.8
12
24
180
160
140
-60 -40 -20 0 20 40 60 80 100 120 140 160
TA (°C)
- 140
Release Point versus Ambient Temperature
- 160
- 180
- 200
- 220
- 240
- 260
VCC (V)
3.8
12
24
- 280
- 300
-60 -40 -20 0 20 40 60 80 100 120 140 160
TA (°C)
Switchpoint Hysteresis versus Ambient Temperature
600
560
520
480
440
400
360
VCC (V)
3.8
12
24
320
280
-60 -40 -20 0 20 40 60 80 100 120 140 160
TA (°C)
300
280
260
240
220
200
180
160
140
2
Operate Point versus Supply Voltage
TA (°C)
–40
25
150
6 10 14 18 22 26
VCC (V)
-140
-160
-180
-200
-220
-240
-260
-280
-300
2
Release Point versus Supply Voltage
6 10 14 18 22
VCC (V)
TA (°C)
–40
25
150
600
560
520
480
440
400
360
320
280
2
Switchpoint Hysteresis versus Supply Voltage
6 10 14 18 22
VCC (V)
TA (°C)
–40
25
150
26
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
6 Page A1225, A1227
and A1229
Hall Effect Latch for High Temperature Operation
Package UA 3-Pin SIP
4.09
+0.08
–0.05
45°
3.02
+0.08
–0.05
E
2.04
2.16
MAX
0.51
REF
12 3
B
1.44 E
E
Branded
Face
0.79 REF
A
15.75 ±0.51
C
1.52 ±0.05
Mold Ejector
Pin Indent
NN
45°
1
D Standard Branding Reference View
= Supplier emblem
N = Last two digits of device part number
0.41
+0.03
–0.06
For Reference Only; not for tooling use (reference DWG-9049)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar pro
Exact case and lead configuration at supplier discretion within l
A Dambar removal protrusion (6X)
B Gate burr area
C Active Area Depth, 0.50 mm REF
D Branding scale and appearance at supplier discretion
E Hall element, not to scale
0.43
+0.05
–0.07
1.27 NOM
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
12 Page | ||
Seiten | Gesamt 13 Seiten | |
PDF Download | [ A1227 Schematic.PDF ] |
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