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GS4881-ITA Schematic ( PDF Datasheet ) - ETC

Teilenummer GS4881-ITA
Beschreibung Monolithic Video Sync Separators
Hersteller ETC
Logo ETC Logo 




Gesamt 14 Seiten
GS4881-ITA Datasheet, Funktion
GS1881, GS4881, GS4981
Monolithic Video Sync Separators
FEATURES
• noise tolerant odd/even flag, back porch and
horizontal sync pulse
• fast recovery from impulse noise
• excellent temperature stability
• 0.5 V to 4 Vpp input signal amplitude with 5 V
supply
• well-controlled clamp discharge current and
slicing level
• programmable horizontal scan rate (up to 130 kHz)
• composite, vertical, back porch, odd/even
(GS1881, GS4881), horizontal (GS4981) outputs
• predictable vertical output pulse width with
default trigger for non-standard video signals
• 5 V to 12 V supply voltage range
• pin compatible with LM1881 sync separator
SELECTION CHART
APPLICATION
Direct LM1881 Replacement
with Improved Performance
New Applications
Substitution for LM1881
New Applications Requiring
Horizontal Sync Output
CHOOSE DEVICE:
GS1881
GS4881
GS4981
DATA SHEET
DESCRIPTION
The GS1881, GS4881 and GS4981 are general purpose sync
separators for use in a wide variety of video applications. The
devices extract the timing information from composite video
signals with scan rates from 15 to 130 kHz.
The GS1881 is a drop-in replacement for the industry standard
LM1881 with much improved performance. The device
generates composite sync, vertical sync, back porch and
odd/even field signals. The GS4881 is identical to the GS1881
but features a noise immune back porch pulse which maintains
a constant H rate during the vertical interval. The GS4981 is
identical to the GS4881, except that it provides horizontal sync
in place of the odd/even output.
All three devices feature a self-adjusting windowing circuit for
noise immunity, which synchronizes to H rate. This
windowing circuit determines the odd or even field
in the GS1881 and GS4881, gates the back porch pulse in
the GS4881 and GS4981, and generates the horizontal sync
output in the GS4981.
The devices feature an improved input stage which ensures
that the input signal is sliced at a predictable point due to
well-controlled input clamp discharge current and sync
slicing level. A missing pulse detector enables the devices to
recover quickly from impulse noise disturbances by temporarily
increasing the clamp discharge current by roughly ten times.
The input stage will operate with signals from 0.5 to 4 volts
peak to peak with a 5 volt supply.
The GS1881, GS4881 and GS4981 also feature a predictable
vertical output pulse width with a default trigger for non-standard
video signals. All three are available in commercial and
industrial temperature ranges and are packaged in both DIP
and SOIC.
PIN CONNECTIONS
GS1881, GS4881
GS4981
COMPOSITE
SYNC OUT
COMPOSITE
VIDEO IN
VERTICAL
SYNC OUT
GROUND
1
2
3
4
8 Vcc
7 ODD/EVEN
6 RSET
5 BACK PORCH
COMPOSITE
SYNC OUT
COMPOSITE
VIDEO IN
VERTICAL
SYNC OUT
GROUND
1
2
3
4
8 Vcc
7 HORIZONTAL
6 RSET
5 BACK PORCH
8 PIN DIP
8 PIN SOIC
Patent No. 5,432,559
Revision Date: October 1995
8 PIN DIP
8 PIN SOIC
Document No. 520 - 23 - 03
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-2055
Japan Branch: A-302 Miyamae Village, 2-10-42 Miyamae, Suginami-ku, Tokyo 168, Japan tel. (03) 3247-8838 fax (03) 3247-8839






GS4881-ITA Datasheet, Funktion
TEMPERATURE CHARACTERISTICS (VS = 5V, RSET = 680 kunless otherwise shown)
Commercial Temperature Range (0 - 70 °C)
10
8
6
4
2
0
-2
-4
-6
-25 -15 -5
5 15 25 35 45 55 65 75 85
TEMPERATURE (°C)
Fig. 7 Composite Sync Delay Variation
vs Temperature
30
20
10
0
-10
-20
-25 -15 -5 5 15 25 35 45 55 65 75 85
TEMPERATURE (°C)
Fig. 9 Back Porch Delay Variation
vs Temperature
25
20
15
10
5
0
-5
-25 -15
520 - 23 - 03
-5 5 15 25 35 45 55 65 75
TEMPERATURE (°C)
Fig. 11 Horizontal Delay Variation
vs Temperature
85
6
850
740
650
550
450
350
-25 -15 -5
5 15 25 35 45 55
TEMPERATURE (°C)
65 75 85
Fig. 8 Clamping Current vs Temperature
125
100
75
50
25
0
-25
-50
-75
100
-125
-25 -15 -5
5 15 25 35 45 55 65 75 85
TEMPERATURE (°C)
Fig. 10 Back Porch Width Variation
vs Temperature
600
500
400
300
200
100
0
-100
-200
-300
-25 -15
-5 5 15 25 35 45 55 65 75
TEMPERATURE (°C)
Fig. 12 Horizontal Width Variation
vs Temperature
85

6 Page









GS4881-ITA pdf, datenblatt
The interfering hum component is defined by:
verifying that there is enough clamping current
vHUM(t) = VPcos(2πƒHUMt)
where: VP = Peak voltage of AC hum
ƒHUM = Frequency of hum (50 Hz or 60 Hz)
The maximum rate of change of this hum signal occurs at the
zero crossing points and is:
dvHUM
dt
t
=
π
2
,
3π
2
= ± VP2πƒHUM
Since the horizontal scan period is much faster than the period
of
the
interference
(
63.5
µs
<<
1/ƒ )
HUM
a
good
approximation
is to assume that the maximum line to line voltage change
resulting from the interfering hum is:
VHUM = ± VP2πƒHUM TLINE
where: TLINE = 63.5 µs
The total line to line voltage change (VT) can then be calculated
by adding the hum component (VHUM ) and the droop
component (VDROOP). This calculation results in two cases:
VT VT
Case A
Case B
VT = VHUM + VDROOP
To correct for VT in case A, the input stage must be able to
charge the input capacitor VT volts in 4.7 µs. This is not a
constraint as the typical clamping current of 650 µA can
accomplish this for practical values of coupling capacitor.
The only way to compensate for VT in case B is to make
VDROOP >VHUM. VDROOP is increased by decreasing the input
coupling capacitor value. Therefore the video designer can
increase hum rejection by decreasing the value of this capacitor.
The following is a numerical example:
Vt = 29.4 mV + 29.4 mV = 58.8 mV
( )... i = 0.022 µ 58.8 mV = 275 µA
4.7 µ
which is less than 650 µA.
(2) FIltering
In order to keep the input to output delay small and temperature
stable, no chrominance filtering is done within the device.
External filtering may be necessary if the input signal contains
large chrominance components (less than 77 mV from sync
tip) or has significant amounts of high frequency noise. This
filter can be a simple low pass RC network constructed by a
resistance (RS) in series with the source and a capacitor (Cƒ)
to ground. A single pole low pass filter having a corner
frequency of approximately 500 kHz will provide ample
bandwidth for passing sync pulses with almost 18 dB
attenuation at 3.58 MHz. Care should be taken in choosing
the value of the series resistor in the filter since the source
resistance seen by the sync separator affects its performance.
As the source resistance rises, the video input sync tip starts
to be clipped due to the clamping current during the sync.
This clamping current is relatively large due to the
non-symmetric duty cycle of video. To a good approximation
the amount of sync clamp current can be calculated as
follows:
( ICLAMPAVG) (TSYNC) = (IDIS) (TLINE - TSYNC)
ICLAMPAVG(4.7 µs) = (11 µA) (63. 5 µs - 4.7 µs)
... ICLAMP AVG = 137.6 µA
This clamp current flows in the source resistance causing a
voltage drop equal to :
VCLIP = ( ICLAMP ) (RS)
AVG
= (137.6 µ) (RS)
choosing Cc = 0.022 µF
...
VDROOP
=
11
0.022
(63.5
µ
-
4.7
µ)
=
29.4 mV
the maximum amount of 60 Hz hum that could be rejected
would be when:
VDROOP = VHUM = VP 2πƒHUM TLINE
... VP = VDROOP =
29.4mV
=1.23vPEAK HUM
2πƒHUMTLINE 2π(60) (63.5 µ)
VIDEO
INPUT
ICLAMP
RS
-+
VCLIP
75
CC
Cƒ
8
2
6
4
680k 0.1µ
Fig. 22 Simple Chrominance Filtering
520 - 23 - 03
12

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