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GM71V18163C-7 Schematic ( PDF Datasheet ) - Hynix Semiconductor

Teilenummer GM71V18163C-7
Beschreibung 1/048/576 WORDS x 16 BIT CMOS DYNAMIC RAM
Hersteller Hynix Semiconductor
Logo Hynix Semiconductor Logo 




Gesamt 11 Seiten
GM71V18163C-7 Datasheet, Funktion
GM71V18163C
GM71VS18163CL
1,048,576 WORDS x 16 BIT
CMOS DYNAMIC RAM
Description
The GM71V(S)18163C/CL is the new
generation dynamic RAM organized 1,048,576
x 16 bit. GM71V(S)18163C/CL has realized
higher density, higher performance and various
functions by utilizing advanced CMOS process
technology. The GM71V(S)18163C/CL offers
Extended Data out(EDO) Mode as a high speed
access mode. Multiplexed address inputs permit
the GM71V(S)18163C/CL to be packaged in
standard 400 mil 42pin plastic SOJ, and standard
400mil 44(50)pin plastic TSOP II. The package
size provides high system bit densities and is
compatible with widely available automated
testing and insertion equipment.
Pin Configuration
Features
* 1,048,576 Words x 16 Bit Organization
* Extended Data Out Mode Capability
* Single Power Supply (3.3V+/-0.3V)
* Fast Access Time & Cycle Time
(Unit: ns)
t t t tRAC CAC RC
HPC
GM71V(S)18163C/CL-5
GM71V(S)18163C/CL-6
GM71V(S)18163C/CL-7
50 13 84
60 15 104
70 18 124
20
25
30
* Low Power
Active : 684/612/540mW (MAX)
Standby : 7.2mW (CMOS level : MAX)
0.83mW (L-version : MAX)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
* All inputs and outputs TTL Compatible
* 1024 Refresh Cycles/16ms
* 1024 Refresh Cycles/128ms (L-version)
* Self Refresh Operation (L-version)
* Battery Back Up Operation (L-version)
* 2 CAS byte Control
42 SOJ
VCC 1
I/O0 2
I/O1 3
I/O2 4
I/O3 5
VCC 6
I/O4 7
I/O5 8
I/O6 9
I/O7 10
NC 11
NC 12
WE 13
RAS 14
NC 15
NC 16
A0 17
A1 18
A2 19
A3 20
VCC 21
44(50) TSOP II
42 VSS
41 I/O15
40 I/O14
39 I/O13
38 I/O12
37 VSS
36 I/O11
35 I/O10
34 I/O9
33 I/O8
32 NC
31 LCAS
30 UCAS
29 OE
28 A9
27 A8
26 A7
25 A6
24 A5
23 A4
22 VSS
(Top View)
VCC 1
I/O0 2
I/O1 3
I/O2 4
I/O3 5
VCC 6
I/O4 7
I/O5 8
I/O6 9
I/O7 10
NC 11
NC 15
NC 16
WE 17
RAS 18
A11 19
A10 20
A0 21
A1 22
A2 23
A3 24
VCC 25
50 VSS
49 I/O15
48 I/O14
47 I/O13
46 I/O12
45 VSS
44 I/O11
43 I/O10
42 I/O9
41 I/O8
40 NC
36 NC
35 LCAS
34 UCAS
33 OE
32 A9
31 A8
30 A7
29 A6
28 A5
27 A4
26 VSS
Rev 0.1 / Apr’01






GM71V18163C-7 Datasheet, Funktion
Read Cycle
Symbol
Parameter
tRAC
tCAC
tAA
tOAC
tRCS
tRCH
tRRH
tRAL
tCAL
tCLZ
tOH
tOHO
tOFF
tOEZ
tCDD
tRCHR
tOHR
tOFR
tWEZ
tWDD
Access Time from RAS
Access Time from CAS
Access Time from Address
Access Time from OE
Read Command Setup Time
Read Command Hold Time to CAS
Read Command Hold Time to RAS
Column Address to RAS Lead Time
Column Address to CAS Lead Time
CAS to Output in Low-Z
Output Data Hold Time
Output Data Hold Time from OE
Output Buffer Turn-off Time
Output Buffer Turn-off Time to OE
CAS to DIN Delay Time
Read Command Hold Time from RAS
Output Data hold Time from RAS
Output Buffer turn off to RAS
Output Buffer turn off to WE
WE to DIN Delay Time
tRDD RAS to DIN Delay Time
GM71V18163C
GM71VS18163CL
GM71V(S)18163 GM71V(S)18163 GM71V(S)18163
C/CL-5
C/CL-6
C/CL-7
Min Max Min Max Min Max
Unit
- 50 - 60 - 70 ns
- 13 - 15 - 18 ns
- 25 - 30 - 35 ns
- 13 - 15 - 18 ns
0-
0-
0-
0-
0-
0-
ns
ns
5- 5- 5-
25 - 30 - 35 -
15 - 18 - 23 -
0- 0- 0-
3- 3- 3-
3- 3- 3-
- 13 - 15 - 15
- 13 - 15 - 15
13 - 15 - 18 -
50 - 60 - 70 -
3 - 3- 3-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
- 13 - 15 - 15
ns
- 13 - 15 - 15
ns
13 - 15 - 18 -
ns
Note
8,9
9,10,17
9,11,17
9
21
12,22
12
27
13,27
13
5
27
27
13 - 15 - 18 -
ns
Rev 0.1 / Apr’01

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