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PDF GTLP8T306MTC Data sheet ( Hoja de datos )
| Número de pieza | GTLP8T306MTC | |
| Descripción | 8-Bit LVTTL/GTLP Bus Transceiver | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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September 1997
Revised April 2000
GTLP8T306
8-Bit LVTTL/GTLP Bus Transceiver
General Description
The GTLP8T306 is an 8-bit bus transceiver that provides
LVTTL to GTLP signal level translation. The device pro-
vides a high speed interface between cards operating at
LVTTL logic levels and a backplane operating at GTLP
logic levels. High speed backplane operation is a direct
result of GTLP’s reduced output swing (<1V), reduced input
threshold levels and output edge rate control. The edge
rate control minimizes bus settling time. GTLP is a Fairchild
Semiconductor derivative of the Gunning Transceiver logic
(GTL) JEDEC standard JESD8-3.
Fairchild’s GTLP has internal output edge-rate control and
is process, voltage, and temperature (PVT) compensated.
Its function is similar to BTL and GTL but with different out-
put levels and receiver thresholds. The GTLP output LOW
level is typically less than 0.5V, the output HIGH level is
1.5V and the receiver threshold is 1.0V.
Features
s Bidirectional interface between GTL/GTLP and LVTTL
logic levels
s Output Edge Rate Control to minimize noise on the
GTLP port
s Power up/down/off high impedance for live insertion
s Standard 245 function
s CMOS technology for low power dissipation
s 5V tolerant inputs and outputs on the A-Port
s Bus-hold data inputs on the A-Port eliminates the need
for external pull-up resistors on unused inputs
s LVTTL compatible driver and control inputs
s Flow through pinout optimizes PCB layout
s Open drain on GTLP to support wired-or connection
s A-Port source/sink −24 mA/+24 mA
s B-Port sink 50 mA
s Recommended Operating Temperature −40°C to +85°C
Ordering Code:
Order Number Package Number
Package Description
GTLP8T306MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
© 2000 Fairchild Semiconductor Corporation DS500051
www.fairchildsemi.com
1 page  
AC Electrical Characteristics
Over recommended range of supply voltage and operating free air-temperature, VREF = 1.0V (unless otherwise noted).
CL = 30 pF for B-Port and CL = 50 pF for A-Port.
Symbol
From (Input)
To (Output)
Min
Typ
(Note 7)
tPLH
tPHL
tPLH
tPHL
tRISE
tFALL
tRISE
tFALL
An Bn
Bn An
Transition Time, B Outputs (20% to 80%)
Transition Time, B Outputs (20% to 80%)
Transition Time, A Outputs (10% to 90%)
Transition Time, A Outputs (10% to 90%)
1.0 4.0
1.0 5.1
1.0 5.8
1.0 4.9
2.6
2.6
2.5
2.5
tPZH, tPZL
tPHZ, tPLZ
OE An 1.0 4.5
1.0 4.9
tPLH
OE
tPHL
Note 7: All typical values are at VCC = 3.3V and TA = 25°C.
Bn
1.0 5.4
1.0 6.0
Max
7.5
7.5
8.3
8.3
9.5
9.5
9.5
9.5
Units
ns
ns
ns
ns
ns
ns
ns
ns
5 www.fairchildsemi.com
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