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GT28F008B3B150 Schematic ( PDF Datasheet ) - Intel Corporation

Teilenummer GT28F008B3B150
Beschreibung SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE
Hersteller Intel Corporation
Logo Intel Corporation Logo 




Gesamt 30 Seiten
GT28F008B3B150 Datasheet, Funktion
E
PRELIMINARY
SMART 3 ADVANCED BOOT BLOCK
BYTE-WIDE
8-MBIT (1024K x 8), 16-MBIT (2056K x 8)
FLASH MEMORY FAMILY
28F008B3, 28F016B3
n Flexible SmartVoltage Technology
2.7V–3.6V Program/Erase
2.7V–3.6V Read Operation
12V VPP Fast Production
Programming
n 2.7V or 1.8V I/O Option
Reduces Overall System Power
n Optimized Block Sizes
Eight 8-Kbyte Blocks for Data,
Top or Bottom Locations
Up to Thirty-One 64-Kbyte Blocks
for Code
n High Performance
2.7V–3.6V: 120 ns Max Access Time
n Block Locking
VCC-Level Control through WP#
n Low Power Consumption
20 mA Maximum Read Current
n Absolute Hardware-Protection
VPP = GND Option
VCC Lockout Voltage
n Extended Temperature Operation
–40°C to +85°C
n Supports Code plus Data Storage
Optimized for FDI, Flash Data
Integrator Software
Fast Program Suspend Capability
Fast Erase Suspend Capability
n Extended Cycling Capability
10,000 Block Erase Cycles
n Automated Byte Program and Block
Erase
Command User Interface
Status Registers
n SRAM-Compatible Write Interface
n Automatic Power Savings Feature
n Reset/Deep Power-Down
1 µA ICCTypical
Spurious Write Lockout
n Standard Surface Mount Packaging
48-Ball µBGA* Package
40-Lead TSOP Package
n Footprint Upgradeable
Upgradeable from 2-, 4- and 8-Mbit
Boot Block
n ETOX™ V (0.4 µ) Flash Technology
n x8-Only Input/Output Architecture
For Space-Constrained 8-bit
Applications
The new Smart 3 Advanced Boot Block, manufactured on Intel’s latest 0.4µ technology, represents a feature-
rich solution at overall lower system cost. Smart 3 flash memory devices incorporate low voltage capability
(2.7V read, program and erase) with high-speed, low-power operation. Several new features have been
added, including the ability to drive the I/O at 1.8V, which significantly reduces system active power and
interfaces to 1.8V controllers. A new blocking scheme enables code and data storage within a single device.
Add to this the Intel-developed Flash Data Integrator (FDI) software and you have the most cost-effective,
monolithic code plus data storage solution on the market today. Smart 3 Advanced Boot Block Byte-Wide
products will be available in 40-lead TSOP and 48-ball µBGA* packages. Additional information on this
product family can be obtained by accessing Intel’s WWW page: http://www.intel.com/design/flcomp
May 1997
Order Number: 290605-001






GT28F008B3B150 Datasheet, Funktion
SMART 3 ADVANCED BOOT BLOCK–BYTE-WIDE
E
1.2 Product Overview
Intel provides the most flexible voltage solution in
the flash industry, providing three discrete voltage
supply pins: VCC for read operation, VCCQ for output
swing, and VPP for program and erase operation.
Discrete supply pins allow system designers to use
the optimal voltage levels for their design. All Smart
3 Advanced Boot Block flash memory products
provide program/erase capability at 2.7V or 12V
and read with VCC at 2.7V. Since many designs
read from the flash memory a large percentage of
the time, 2.7V VCC operation can provide
substantial power savings. The 12V VPP option
maximizes program and erase performance during
production programming.
The Smart 3 Advanced Boot Block flash memory
products are high-performance devices with low
power operation. The available densities for the
byte-wide devices (x8) are
a. 8-Mbit (8,388,608-bit) flash memory
organized as 1 Mbyte of 8 bits each
b. 16-Mbit (16,777,216-bit) flash memory
organized as 2 Mbytes of 8 bits each.
For word-wide devices (x16) see the Smart 3
Advanced Boot Block Word-Wide Flash Memory
Family datasheet.
The parameter blocks are located at either the top
(denoted by -T suffix) or the bottom (-B suffix) of the
address map in order to accommodate different
microprocessor protocols for kernel code location.
The upper two (or lower two) parameter blocks can
be locked to provide complete code security for
system initialization code. Locking and unlocking is
controlled by WP# (see Section 3.3 for details).
The Command User Interface (CUI) serves as the
interface between the microprocessor or
microcontroller and the internal operation of the
flash memory. The internal Write State Machine
(WSM) automatically executes the algorithms and
timings necessary for program and erase
operations, including verification, thereby un-
burdening the microprocessor or microcontroller.
The status register indicates the status of the WSM
by signifying block erase or byte program
completion and status.
Program and erase automation allows program and
erase operations to be executed using an industry-
standard two-write command sequence to the CUI.
Data writes are performed in byte increments. Each
byte in the flash memory can be programmed
independently of other memory locations; every
erase operation erases all locations within a block
simultaneously. Program suspend allows system
software to suspend the program command in order
to read from any other block. Erase suspend allows
system software to suspend the block erase
command in order to read from or program data to
any other block.
The Smart 3 Advanced Boot Block flash memory is
also designed with an Automatic Power Savings
(APS) feature which minimizes system current
drain, allowing for very low power designs. This
mode is entered immediately following the
completion of a read cycle.
When the CE# and RP# pins are at VCC, the ICC
CMOS standby mode is enabled. A deep power-
down mode is enabled when the RP# pin is at
GND, minimizing power consumption and providing
write protection. ICC current in deep power-down is
1 µA typical (2.7V VCC). A minimum reset time of
tPHQV is required from RP# switching high until
outputs are valid to read attempts. With RP# at
GND, the WSM is reset and Status Register is
cleared. Section 3.5 contains additional information
on using the deep power-down feature, along with
other power consumption issues.
The RP# pin provides additional protection against
unwanted command writes that may occur during
system reset and power-up/down sequences due to
invalid system bus conditions (see Section 3.6).
Refer to the DC Characteristics Table, Sections 5.1
and 6.1, for complete current and voltage
specifications. Refer to the AC Characteristics
Table, Section 7.0, for read, program and erase
performance specifications.
2.0 PRODUCT DESCRIPTION
This section explains device pin description and
package pinouts.
6 PRELIMINARY

6 Page









GT28F008B3B150 pdf, datenblatt
SMART 3 ADVANCED BOOT BLOCK–BYTE-WIDE
E
1FFFFF
1FE000
1FDFFF
1FC000
1FBFFF
1FA000
1F9FFF
1F8000
1F7FFF
1F6000
1F5FFF
1F4000
1F3FFF
1F2000
1F1FFF
1F0000
1EFFFF
1E0000
1DFFFF
1D0000
1CFFFF
1C0000
1BFFFF
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1AFFFF
1A0000
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10FFFF
100000
0FFFFF
0F0000
0EFFFF
0E0000
0DFFFF
0D0000
0CFFFF
0C0000
0BFFFF
0B0000
0AFFFF
0A0000
09FFFF
090000
08FFFF
080000
07FFFF
070000
06FFFF
060000
05FFFF
050000
04FFFF
040000
03FFFF
030000
02FFFF
020000
01FFFF
010000
00FFFF
000000
16-Mbit Advanced Boot
Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
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64-Kbyte Block 23
64-Kbyte Block 22
64-Kbyte Block
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64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
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64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
13
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01
0
FFFFF
FE000
FDFFF
FC000
FBFFF
FA000
F9FFF
F8000
F7FFF
F6000
F5FFF
F4000
F3FFF
F2000
F1FFF
F0000
EFFFF
E0000
DFFFF
D0000
CFFFF
C0000
BFFFF
B0000
AFFFF
A0000
9FFFF
90000
8FFFF
80000
7FFFF
70000
6FFFF
60000
5FFFF
50000
4FFFF
40000
3FFFF
30000
2FFFF
20000
1FFFF
10000
0FFFF
00000
8-Mbit Advanced Boot
Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
8-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
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64-Kbyte Block
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64-Kbyte Block
64-Kbyte Block
64-Kbyte Block
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2
01
0
Figure 4. 8-/16-Mbit Advanced Boot Block Byte-Wide Top Boot Memory Maps
0605-05
12 PRELIMINARY

12 Page





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