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EL2072 Schematic ( PDF Datasheet ) - Intersil

Teilenummer EL2072
Beschreibung 730MHz Closed Loop Buffer
Hersteller Intersil
Logo Intersil Logo 




Gesamt 6 Seiten
EL2072 Datasheet, Funktion
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EL2072
FN7033
730MHz Closed Loop Buffer
The EL2072 is a wide bandwidth, fast
settling monolithic buffer built using an
advanced complementary bipolar
process. This buffer is closed loop to achieve lower output
impedance and higher gain accuracy. Designed for closed-
loop unity gain, the EL2072 has a 730MHz -3dB bandwidth
and 5ns settling to 0.2% while consuming only 15mA of
supply current.
The EL2072 is an obvious high-performance solution for
video distribution and line-driving applications. With low
15mA supply current and a 70mA output drive, performance
in these areas is assured.
The EL2072's settling to 0.2% in 5ns, low distortion, and
ability to drive capacitive loads make it an ideal flash A/D
driver. The wide 730MHz bandwidth and extremely linear
phase allow unmatched signal fidelity.
The EL2072 can be used inside an amplifier loop or PLL as
its wide bandwidth and fast rise time have minimal effect on
loop dynamics.
Elantec products and facilities comply with MIL-I-45028A,
and other applicable quality specifications. For information
on Elantec's processing, see Elantec document QRA-1:
Elantec's Processing, Monolithic Integrated Circuits.
Pinout
EL2072
(8-PIN PDIP SO)
TOP VIEW
Features
• 730MHz -3dB bandwidth (0.5VPP)
• 5ns settling to 0.2%
• VS = ±5V @ 15mA
• Low distortion: HD2, HD3 of -65dBc at 20MHz
• Overload/short-circuit protected
• Closed-loop, unity gain
• Low cost
• Direct replacement for CLC110
Applications
• Video buffer
• Video distribution
• HDTV buffer
• High-speed A/D buffer
• Photodiode, CCD preamps
• IF processors
• High-speed communications
Ordering Information
PART
NUMBER
EL2072CN
EL2072CS
TEMP.
RANGE
-40°C to +85°C
-40°C to +85°C
PACKAGE
8-Pin PDIP
8-Pin SO
PKG. NO.
MDP0031
MDP0027
Manufactured under U.S. Patent No. 4,893,091
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.






EL2072 Datasheet, Funktion
Burn-In Circuit
EL2072
Printed Circuit Layout
As with any high-frequency device, good PCB layout is
necessary for optimum performance. This is especially
important for the EL2072, which has a typical bandwidth of
730MHz. Ground plane construction is a requirement, as is
good power-supply bypassing close to the package. A
closely-placed 0.01µF ceramic capacitor between each
supply pin and the ground plane is usually sufficient
decoupling.
Pins 2, 3, 6, and 7 should be connected to the ground-plane
to minimize capacitive feedthrough, and all input and output
traces should be laid out as transmission lines and
terminated as close to the EL2072 package as possible.
Increasing capacitance on the output of the EL2072 will add
phase shift, decreasing phase margin and increasing
frequency-response peaking. A small series resistor before
the capacitance decouples this effect, and should be used
for large capacitance values. Please refer to the graphs for
the appropriate resistor value to be used.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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