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R1LV0414D Schematic ( PDF Datasheet ) - Renesas

Teilenummer R1LV0414D
Beschreibung 4M SRAM
Hersteller Renesas
Logo Renesas Logo 




Gesamt 14 Seiten
R1LV0414D Datasheet, Funktion
R1LV0414D Series
4M SRAM (256-kword × 16-bit)
REJ03C0312-0100
Rev.1.00
May.24.2007
Description
The R1LV0414D is a 4-Mbit static RAM organized 256-kword × 16-bit, fabricated by Renesas’s high-performance
0.15µm CMOS and TFT technologies. R1LV0414DSeries has realized higher density, higher performance and low
power consumption. The R1LV0414D Series offers low power standby power dissipation; therefore, it is suitable for
battery backup systems. It has packaged in 44-pin TSOP II.
Features
Single 3.0 V supply: 2.7 V to 3.6 V
Fast access time: 55/70 ns (max)
Power dissipation:
Standby: 3 µW (typ) (VCC = 3.0 V)
Equal access and cycle times
Common data input and output.
Three state output
Battery backup operation.
Temperature range: -40 to +85°C
Ordering Information
Type No.
R1LV0414DSB-5SI
R1LV0414DSB-7LI
Access time
55 ns
70 ns
Package
400-mil 44-pin plastic TSOP II (44P3W-H)
Rev.1.00, May.24.2007, page 1 of 12






R1LV0414D Datasheet, Funktion
R1LV0414D Series
AC Characteristics
(Ta = 40 to +85°C, VCC = 2.7 V to 3.6 V)
Test Conditions
Input pulse levels: VIL = 0.4 V, VIH = 2.4 V
Input rise and fall time: 5 ns
Input/output timing reference levels: 1.4 V
Output load: See figures (Including scope and jig)
Dout
50 pF
1.4 V
RL=500
Read Cycle
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Output hold from address change
LB#, UB# access time
Chip select to output in low-Z
LB#, UB# disable to low-Z
Output enable to output in low-Z
Chip deselect to output in high-Z
LB#, UB# disable to high-Z
Output disable to output in high-Z
Output load
Symbol
tRC
tAA
tACS
tOE
tOH
tBA
tCLZ
tBLZ
tOLZ
tCHZ
tBHZ
tOHZ
R1LV0414D
-5SI -7LI
Min Max Min Max
55 70
55 70
55 70
35 40
10 10
55 70
10 10
55
55
0 20 0 25
0 20 0 25
0 20 0 25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2, 3
2, 3
2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Rev.1.00, May.24.2007, page 6 of 12

6 Page









R1LV0414D pdf, datenblatt
R1LV0414D Series
Low VCC Data Retention Timing Waveform (1) (CS# Controlled)
VCC
2.7 V
t CDR
Data retention mode
2.2 V
VDR
CS#
0V
CS# VCC – 0.2 V
Low VCC Data Retention Timing Waveform (2) (LB#, UB# Controlled)
VCC
2.7 V
t CDR
Data retention mode
2.2 V
VDR
LB#, UB#
0V
LB#, UB# VCC – 0.2 V
tR
tR
Rev.1.00, May.24.2007, page 12 of 12

12 Page





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