AD5593R Datasheet PDF - Analog Devices
| Part Number | AD5593R | |
| Description | Configurable ADC/DAC | |
| Manufacturers | Analog Devices | |
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Data Sheet
8-Channel, 12-Bit, Configurable ADC/DAC
with On-Chip Reference, I2C Interface
AD5593R
FEATURES
8-channel, configurable ADC/DAC/GPIO
Configurable as any combination of
8 12-bit DAC channels
8 12-bit ADC channels
8 general-purpose I/O pins
Integrated temperature sensor
16-lead TSSOP package
I2C interface
APPLICATIONS
Control and monitoring
General-purpose analog and digital I/O
GENERAL DESCRIPTION
The AD5593R has eight input/output (I/O) pins, which can be
independently configured as digital-to-analog converter (DAC)
outputs, analog-to-digital converter (ADC) inputs, digital outputs,
or digital inputs. When an I/O pin is configured as an analog
output, it is driven by a 12-bit DAC. The output range of the
DAC is 0 V to VREF or 0 V to 2 × VREF. When an I/O pin is
configured as an analog input, it is connected to a 12-bit ADC
via an analog multiplexer. The input range of the ADC is 0 V to
VREF or 0 V to 2 × VREF. The I/O pins can also be configured to
be general-purpose, digital input or output (GPIO) pins. The
state of the GPIO pins can be set or read back by accessing the
GPIO write data register and GPIO read configuration registers,
respectively, via an I2C write or read operation.
The AD5593R has an integrated 2.5 V, 20 ppm/°C reference that
is turned off by default and an integrated temperature indicator
that gives an indication of the die temperature. The temperature
value is read back as part of an ADC read sequence.
The AD5593R is available in a 16-lead TSSOP and operates over
a temperature range of −40°C to +105°C.
Table 1. Related Products
Product
Description
AD5592R AD5593R equivalent with SPI interface
AD5592R-1 AD5593R equivalent with SPI interface and VLOGIC pin
FUNCTIONAL BLOCK DIAGRAM
VLOGIC
VDD
VREF
SCL
SDA
A0
RESET
AD5593R
POWER-ON
RESET
INPUT
REGISTER
DAC
REGISTER
DAC 0
2.5V
REFERENCE
GPIO0
I2C
INTERFACE
LOGIC
INPUT
REGISTER
DAC
REGISTER
DAC 7
SEQUENCER
TEMPERATURE
INDICATOR
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
T/H
GPIO7
MUX
I/O0
I/O7
GND
Figure 1.
Rev. 0
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
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Data Sheet
AD5593R
Parameter
LOGIC INPUTS
Input Voltage
High, VINH
Low, VINL
Input Current, IIN
Input Capacitance, CIN
LOGIC OUTPUT (SDA)
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Output Capacitance
TEMPERATURE SENSOR2
Resolution
Operating Range
Accuracy
Track Time
POWER REQUIREMENTS
VDD
IDD
Power-Down Mode
Normal Mode
VDD = 5 V
VDD = 3 V
Min
Typ Max
Unit Test Conditions/Comments
0.7 × VLOGIC
−1 +0.01
0.3 × VLOGIC
+1
10
V
V
µA
pF
VLOGIC − 0.2
10
0.4
V
V
pF
12 Bits
−40
+105
°C
±3 °C
5 µs
20 µs
2.7 5.5 V
2.7
3.5 µA
1.6 mA
1 mA
2.4 mA
1.1 mA
1 mA
0.75 mA
0.5 mA
0.5 mA
1.1 mA
1 mA
1.1 mA
0.78 mA
0.75 mA
0.5 mA
0.45 mA
0.45 mA
ISOURCE = 200 µA; VDD = 2.7 V to 5.5 V
ISINK = 200 µA
ADC buffer enabled
ADC buffer disabled
Digital inputs = 0 V or VDD
I/O0 to I/O7 are DACs, internal reference, gain = 2
I/O0 to I/O7 are DACs, external reference, gain = 2
I/O0 to I/O7 are DACs and sampled by the ADC,
internal reference, gain = 2
I/O0 to I/O7 are DACs and sampled by the ADC,
external reference, gain = 2
I/O0 to I/O7 are ADCs, internal reference, gain = 2
I/O0 to I/O7 are ADCs, external reference, gain = 2
I/O0 to I/O7 are general-purpose outputs
I/O0 to I/O7 are general-purpose inputs
I/O0 to I/O7 are DACs, internal reference, gain = 1
I/O0 to I/O7 are DACs, external reference, gain = 1
I/O0 to I/O7 are DACs and sampled by the ADC,
internal reference, gain = 1
I/O0 to I/O7 are DACs and sampled by the ADC,
external reference, gain = 1
I/O0 to I/O7 are ADCs, internal reference, gain = 1
I/O0 to I/O7 are ADCs, external reference, gain = 1
I/O0 to I/O7 are general-purpose outputs
I/O0 to I/O7 are general-purpose inputs
1 When using the internal ADC buffer, there is a dead band of 0 V to 5 mV.
2 Guaranteed by design and characterization; not production tested.
3 All specifications expressed in decibels are referred to full-scale input, FSR, and tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
4 DC specifications tested with the outputs unloaded, unless otherwise noted. Linearity calculated using a reduced code range of 8 to 4085. An upper dead band of
10 mV exists when VREF = VDD.
5 When drawing a load current at either rail, the output voltage headroom with respect to that rail is limited by the 25 Ω typical channel resistance of the output
devices. For example, when sinking 1 mA, the minimum output voltage = 25 Ω × 1 mA = 25 mV (see Figure 24 and Figure 25).
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