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Descripción MOSFET ( Transistor )
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PSMN3R8-100BS
N-channel 100 V 3.9 mstandard level MOSFET in D2PAK
Rev. 2 — 29 February 2012
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in a D2PAK package qualified to 175 °C. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for standard level gate drive
sources
1.3 Applications
DC-to-DC converters
Load switching
Motor control
Server power supplies
1.4 Quick reference data
Table 1. Quick reference data
Symbol
Parameter
VDS drain-source voltage
ID drain current
Ptot total power dissipation
Tj junction temperature
Static characteristics
RDSon
drain-source on-state
resistance
Dynamic characteristics
QGD gate-drain charge
QG(tot)
total gate charge
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source
avalanche energy
Conditions
Tj 25 °C; Tj 175 °C
Tmb = 25 °C; VGS = 10 V; see Figure 1
Tmb = 25 °C; see Figure 2
VGS = 10 V; ID = 25 A; Tj = 100 °C;
see Figure 12; see Figure 13
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 12; see Figure 13
VGS = 10 V; ID = 75 A; VDS = 50 V;
see Figure 14; see Figure 15
VGS = 10 V; Tj(init) = 25 °C; ID = 120 A;
Vsup 100 V; RGS = 50 ; Unclamped
[1] Continuous current is limited by package.
Min Typ Max Unit
- - 100 V
[1] - - 120 A
- - 306 W
-55 -
175 °C
- 5.9 6.9 m
- 3.28 3.9 m
- 49 - nC
- 170 - nC
- - 537 mJ

1 page




PSMN3R8-100BS pdf
NXP Semiconductors
PSMN3R8-100BS
N-channel 100 V 3.9 mstandard level MOSFET in D2PAK
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Conditions
Static characteristics
V(BR)DSS
VGS(th)
drain-source breakdown
voltage
gate-source threshold
voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 10
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 11; see Figure 10
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 100 V; VGS = 0 V; Tj = 25 °C
VDS = 100 V; VGS = 0 V; Tj = 175 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 12; see Figure 13
VGS = 10 V; ID = 25 A; Tj = 100 °C;
see Figure 12; see Figure 13
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 12; see Figure 13
RG gate resistance
Dynamic characteristics
f = 1 MHz
QG(tot)
total gate charge
ID = 75 A; VDS = 50 V; VGS = 10 V;
see Figure 14; see Figure 15
ID = 0 A; VDS = 0 V; VGS = 10 V
QGS
gate-source charge
ID = 75 A; VDS = 50 V; VGS = 10 V;
see Figure 15; see Figure 14
QGS(th)
pre-threshold gate-source ID = 75 A; VDS = 50 V; VGS = 10 V;
charge
see Figure 14; see Figure 15
QGS(th-pl)
post-threshold gate-source
charge
QGD
VGS(pl)
gate-drain charge
gate-source plateau voltage VDS = 50 V; see Figure 14;
see Figure 15
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
VDS = 50 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
VDS = 50 V; RL = 0.67 ; VGS = 10 V;
RG(ext) = 4.7 ; ID = 75 A; Tj = 25 °C
Min Typ Max Unit
100 -
90 -
--
-V
-V
4.6 V
1- - V
234V
- 0.08 10 µA
- 250 500 µA
- 10 100 nA
- 10 100 nA
- 9 10.6 m
- 5.9 6.9 m
- 3.28 3.9 m
- 0.9 -
- 170 - nC
- 140 - nC
- 48 - nC
- 31 - nC
- 17.3 - nC
- 49 - nC
- 5.1 - V
- 9900 - pF
- 660 - pF
- 381 - pF
- 45 - ns
- 91 - ns
- 122 - ns
- 63 - ns
PSMN3R8-100BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 29 February 2012
© NXP B.V. 2012. All rights reserved.
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PSMN3R8-100BS arduino
NXP Semiconductors
PSMN3R8-100BS
N-channel 100 V 3.9 mstandard level MOSFET in D2PAK
8. Revision history
Table 7. Revision history
Document ID
Release date
Data sheet status
PSMN3R8-100BS v.2
Modifications:
20120229
Product data sheet
Status changed from objective to product.
Various changes to content.
PSMN3R8-100BS v.1 20110829
Objective data sheet
Change notice
-
-
Supersedes
PSMN3R8-100BS v.1
-
PSMN3R8-100BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 29 February 2012
© NXP B.V. 2012. All rights reserved.
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