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Número de pieza PSMN5R0-80BS
Descripción MOSFET ( Transistor )
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PSMN5R0-80BS
N-channel 80 V, 5.1 mstandard level MOSFET in D2PAK
Rev. 1 — 20 March 2012
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in SOT404 package qualified to 175 °C. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for standard level gate drive
sources
1.3 Applications
DC-to-DC converters
Load switching
Motor control
Server power supplies
1.4 Quick reference data
Table 1. Quick reference data
Symbol
VDS
ID
Parameter
drain-source voltage
drain current
Conditions
Tj 25 °C; Tj 175 °C
Tmb = 25 °C; VGS = 10 V;
see Figure 1
[1]
Ptot total power dissipation
Tj junction temperature
Static characteristics
Tmb = 25 °C; see Figure 2
RDSon
drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj = 100 °C;
see Figure 13; see Figure 12
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 12
Dynamic characteristics
QGD gate-drain charge
QG(tot)
total gate charge
Avalanche ruggedness
VGS = 10 V; ID = 25 A; VDS = 40 V;
see Figure 14; see Figure 15
EDS(AL)S
non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C;
ID = 100 A; Vsup 80 V; RGS = 50 ;
unclamped
Min
-
-
-
-55
-
-
-
-
-
[1] Continuous current is limited by package
Typ Max Unit
- 80 V
- 100 A
- 270 W
- 175 °C
7.19 8.5
4.36 5.1
m
m
21 -
101 -
nC
nC
- 396 mJ

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PSMN5R0-80BS pdf
NXP Semiconductors
PSMN5R0-80BS
N-channel 80 V, 5.1 mstandard level MOSFET in D2PAK
6. Thermal characteristics
Table 6.
Symbol
Rth(j-mb)
Rth(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to
mounting base
thermal resistance from junction to
ambient
Conditions
see Figure 4
Minimum footprint; mounted on a
printed circuit board
Min Typ Max Unit
- 0.3 0.56 K/W
- 50 - K/W
1
Zth(j-mb)
(K/W)
10-1
10-2
δ = 0.5
0.2
0.1
0.05
0.02
10-3
003aad080
P δ = tp
T
single shot
tp t
T
10-4
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration; typical
values
PSMN5R0-80BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 March 2012
© NXP B.V. 2012. All rights reserved.
5 of 15

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PSMN5R0-80BS arduino
NXP Semiconductors
PSMN5R0-80BS
N-channel 80 V, 5.1 mstandard level MOSFET in D2PAK
8. Package outline
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
SOT404
D1
D
HD
E
2
13
ee
b
A
A1
mounting
base
Lp
c
Q
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A A1 b
c
D
max.
D1
mm 4.50 1.40 0.85 0.64 11 1.60
4.10 1.27 0.60 0.46
1.20
E
10.30
9.70
e
2.54
Lp HD Q
2.90 15.80 2.60
2.10 14.80 2.20
OUTLINE
VERSION
SOT404
IEC
REFERENCES
JEDEC
JEITA
Fig 18. Package outline SOT404 (D2PAK)
EUROPEAN
PROJECTION
ISSUE DATE
05-02-11
06-03-16
PSMN5R0-80BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 March 2012
© NXP B.V. 2012. All rights reserved.
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