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ACPL-W302-060E Schematic ( PDF Datasheet ) - Avago Technologies

Teilenummer ACPL-W302-060E
Beschreibung 0.4 Amp Output Current IGBT Gate Driver Optocouplers
Hersteller Avago Technologies
Logo Avago Technologies Logo 




Gesamt 14 Seiten
ACPL-W302-060E Datasheet, Funktion
ACPL-P302/W302
0.4 Amp Output Current IGBT Gate Driver Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
The ACPL-P302/W302 consists of a GaAsP LED optically
coupled to an integrated circuit with a power output
stage. These optocouplers are ideally suited for driving
power IGBTs and MOSFETs used in motor control invert-
er applications. The high operating voltage range of the
output stage provides the drive voltages required by gate
controlled devices. The voltage and current supplied by
this optocoupler makes it ideally suited for directly driving
small or medium power IGBTs.
Applications
x Isolated IGBT/Power MOSFET gate drive
x AC and brushless DC motor drives
x Industrial inverters
x Inverter for home appliances
x Induction cooker
x Switching Power Supplies (SPS)
Functional Diagram
ANODE 1
N.C. 2
CATHODE 3
SHIELD
6 VCC
5 VO
4 VEE
Truth Table
LED VO
OFF LOW
ON HIGH
Note: A 0.1 μF bypass
apacitor must be connected
between pins VCC and VEE.
Features
x High speed response.
x Ultra high CMR.
x Bootstrappable supply current.
x Available in Stretched SO-6 package
x Package Clearance/Creepage at 8mm (ACPL-W302)
x Safety Approval:
UL1577 recognized with 3750 Vrms for 1 minute for
ACPL-P302 and 5000 Vrms for 1 minute for ACPL-
W302.
CSA Approved.
IEC/EN/DIN EN 60747-5-2 Approved
VIORM = 891 Vpeak for ACPL-P302
VIORM = 1140 Vpeak for ACPL-W302
Specifications
x 0.4 A maximum peak output current.
x 0.2 A minimum peak output current.
x 0.7 μs maximum propagation delay over temperature
range.
x ICC(max) = 3 mA maximum supply current.
x 10 kV/μs minimum common mode rejection (CMR) at
VCM = 1000 V.
x Wide VCC operating range: 10 V to 30 V over tempera-
ture range.
x Wide operating temperature range: –40°C to 100°C.
CAUTION: IT IS ADVISED THAT NORMAL STATIC PRECAUTIONS BE TAKEN IN HANDLING AND ASSEMBLY
OF THIS COMPONENT TO PREVENT DAMAGE AND/OR DEGRADATION WHICH MAY BE INDUCED BY ESD.






ACPL-W302-060E Datasheet, Funktion
Table 5. Electrical Specifications (DC)
Over recommended operating conditions unless otherwise specified.
Parameter
High Level Output Current
Symbol
IOH
Min. Typ.
0.15
0.2 0.3
Max. Units
A
A
Low Level Output Current
IOL 0.15
0.2 0.3
A
A
High Level Output Voltage
Low Level Output Voltage
High Level Supply Current
Low Level Supply Current
Threshold Input Current
Low to High
Threshold Input Voltage
High to Low
Input Forward Voltage
Temperature Coefficient of
Input Forward Voltage
Input Reverse Breakdown Voltage
Input Capacitance
VOH VCC-4 VCC-1.8
VOL 0.4 1
ICCH 0.7 3
ICCL 1.2 3
IFLH 6
VFHL
0.8
VF
'VF/'TA
1.2
1.5
-1.6
1.8
BVR 5
CIN 60
V
V
mA
mA
mA
V
V
mV/°C
V
pF
Test Conditions
VO = VCC - 4
VO = VCC - 10
VO = VEE + 2.5
VO = VEE + 10
IO = -100 mA
IO = 100 mA
IF = 10 mA
IF = 0 mA
IO = 0 mA, VO > 5 V
IO = 0 mA, VO > 5 V
IF = 10 mA
IF = 10 mA
IR = 10 μA
f = 1 MHz, VF = 0 V
Fig. Note
5
22
5
42
1 6, 7
3
5, 6 15
5, 6 15
7, 13
14
Table 6. Switching Specifications (AC)
Over recommended operating conditions unless otherwise specified.
Parameter
Symbol Min. Typ. Max. Units
Propagation Delay Time
to High Output Level
tPLH
0.1 0.2
0.7 μs
Propagation Delay Time
to Low Output Level
Propagation Delay Difference
Between Any Two Parts or
Channels
Rise Time
Fall Time
Output High Level Common
Mode Transient Immunity
Output Low Level Common
Mode Transient Immunity
tPHL
0.1 0.3
0.7 μs
PDD -0.5
0.5 μs
tR 50
tF 50
|CMH|
10
|CML|
10
ns
ns
kV/μs
kV/μs
Test Conditions
Rg = 75:, Cg = 1.5 nF,
f = 10 kHz,
Duty Cycle = 50%,
IF = 7 mA, VCC = 30 V
TA = 25°C,
VCM = 1000 V
Fig.
8, 9,
10, 11,
12, 15
Note
14
14
11
16 12
16 13
6

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ACPL-W302-060E pdf, datenblatt
LED Drive Circuit Considerations for Ultra High CMR Per-
formance
Without a detector shield, the dominant cause of opto-
coupler CMR failure is capacitive coupling from the input
side of the optocoupler, through the package, to the
detector IC as shown in Figure 19. The ACPL-P302/W302
improves CMR performance by using a detector IC with
an optically transparent Faraday shield, which diverts the
capacitively coupled current away from the sensitive IC
circuitry. However, this shield does not eliminate the ca-
pacitive coupling between the LED and optocoupler pins
5-8 as shown in Figure 20. This capacitive coupling causes
perturbations in the LED current during common mode
transients and becomes the major source of CMR failures
for a shielded optocoupler. The main design objective of
a high CMR LED drive circuit becomes keeping the LED in
the proper state (on or off ) during common mode tran-
sients. For example, the recommended application circuit
(Figure 17), can achieve 10 kV/μs CMR while minimizing
component complexity.
Techniques to keep the LED in the proper state are dis-
cussed in the next two sections.
1 CLEDP
6
25
3 CLEDN
4
Figure 19. Optocoupler Input to Output Capacitance Model for Unshielded
Optocouplers.
CMR with the LED Off (CMRL)
A high CMR LED drive circuit must keep the LED off (VF
d VF(OFF)) during common mode transients. For example,
during a -dVCM/dt transient in Figure 21, the current
flowing through CLEDP also flows through the RSAT and
VSAT of the logic gate. As long as the low state voltage de-
veloped across the logic gate is less than VF(OFF) the LED
will remain off and no common mode failure will occur.
+5V
+
VSAT
-
1 CLEDP
ILEDP
2
6
0.1 mF
5
3 CLEDN
SHIELD
4
· THEARROWS INDICATETHEDIRECTION
· OF CURRENTFLOW DURING - dVCM/ dt
+VCC = 18V
- Rg
VCM
Figure 21. Equivalent Circuit for Figure 15 During Common Mode Transient.
The open collector drive circuit, shown in Figure 22, can
not keep the LED off during a +dVCM/dt transient, since
all the current flowing through CLEDN must be supplied
by the LED, and it is not recommended for applications
requiring ultra high CMRL performance. The alternative
drive circuit which like the recommended application
circuit (Figure 17), does achieve ultra high CMR perfor-
mance by shunting the LED in the off state.
+5 V
1 CLEDP
6
1 CLEDP CLED01
2 CLED02
3 CLEDN SHIELD
6
5
4
2
CLEDN
3 ILEDN
SHIELD
Q1
5
4
Figure 20. Optocoupler Input to Output Capacitance Model for Shielded
Optocouplers.
CMR with the LED On (CMRH)
A high CMR LED drive circuit must keep the LED on during
common mode transients. This is achieved by overdriv-
ing the LED current beyond the input threshold so that
it is not pulled below the threshold during a transient. A
minimum LED current of 7 mA provides adequate margin
over the maximum IFLH of 5 mA to achieve 10 kV/μs CMR.
Figure 22. Not Recommended Open Collector Drive Circuit.
+5 V
1 CLEDP
6
25
3 CLEDN SHIELD
4
Figure 23. Recommended LED Drive Circuit for Ultra-High CMR Dead Time
and Propagation Delay Specifications.
12

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