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PDF AND8293D Data sheet ( Hoja de datos )
| Número de pieza | AND8293D | |
| Descripción | Implementing an LCD TV Power Supply | |
| Fabricantes | ON Semiconductor | |
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Hay una vista previa y un enlace de descarga de AND8293D (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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AND8293/D
Implementing an LCD TV
Power Supply with the
NCP1396A, NCP1605, and
NCP1027
Prepared by Roman Stuler
http://onsemi.com
Introduction
This document provides a detailed description of the
implementation of an LCD TV power supply. The LDC TV
supply unit exhibits high efficiency, low EMI noise and a low
profile construction. The board contains DCM/CCM PFC
front stage, 210 W LLC power stage and 12.5 W standby
flyback converter.
The design requirements for our LCD TV power unit are
as follows:
Requirement
Min Max Unit
Input Voltage
90 265 Vac
Output Voltage 1
- 12 Vdc
Output Current 1
03 A
Output Voltage 2
- 24 Vdc
Output Current 2
06 A
Output Voltage 3
- 30 Vdc
Output Current 3
01 A
Output Voltage Standby Output - 5 Vdc
Output Current Standby Output
0 2.5 A
Total Output Power
0 222.5 W
Total No Load Consumption for
0.5W Load on the Standby Output
-
1W
NOTE:
Only 24 V output is regulated in this version of the board.
Additional output(s) regulation can be assured by adding
feedback resistors to desired output (or outputs for
percentage weight).
The NCP1396A resonant mode controller has been
selected for this application because the soft- start absence on
the fast fault input offers an easy implementation of the skip
cycle mode. This helps to assure regulation of the resonant
converter under no load conditions. The NCP1396A offers
many other features that are advantageous for our application.
Brown-Out (BO) Protection Input
The input voltage of the resonant converter, when divided
down, is permanently monitored by the Brownout pin. If the
voltage on the bulk capacitor falls outside of the desired
operating range, the controller drive output will be shut off.
This feature is necessary for an LLC topology that uses PFC
stage without PFC OK control output. In our case the BO
input is used as an enabling input and is fully controlled by the
front stage controller output (PFC OK).
Timer Based Fault Protection
The converter stops operation after a programmed delay
when the protection is activated. This protection can be
implemented as a cumulative or integrating characteristic.
Thus, under transient load conditions the converter output
will not be turned off, unless the extreme load condition
exceeds the timeout.
Common Collector Optocoupler Connection
The open collector output allows multiple inputs on the
feedback pin i.e. over current sensing circuit, over
temperature sensor, etc. The additional input can pull up the
feedback voltage level and take over the voltage feedback
loop.
600 V High Voltage Floating Driver
The high side driver features a traditional bootstrap
circuitry, requiring an external high-voltage diode for the
capacitor refueling path. The device incorporates an upper
UVLO circuitry that guarantees enough Vgs is available for
the upper side MOSFET.
Adjustable Dead-Time (DT)
Due to a single resistor wired between DT pin and ground,
the user has the option to include needed dead- time, helping
to fight cross- conduction between the upper and the lower
transistor.
Adjustable Minimum and Maximum Frequency
Excursion
Using a single external resistor, the designer can program
its lowest frequency point, obtained in lack of feedback
voltage (during the startup sequence or in short- circuit
conditions). Internally trimmed capacitors offer a $3%
precision on the selection of the minimum switching
frequency. The adjustable maximum frequency is less precise
($15%). Please refer to the NCP1396A/B data sheet for
detailed description of all mentioned and additional features.
Detailed Demo Board Connection Description
A schematic of the proposed LCD TV power supply is
shown in Figure 1. As already mentioned, the supply contains
three blocks: a PFC front stage, an LLC converter and an
auxiliary flyback converter that powers a TV set during
standby and provides bias power for PFC and LLC control
circuits during normal operation.
©Ă Semiconductor Components Industries, LLC, 2007
June, 2007 - Rev. 1
1
Publication Order Number:
AND8293/D
1 page  
AND8293/D
• The minimum needed operating frequency to assure
low line regulation is 79 kHz
• The maximum needed operating frequency to assure
high line regulation is 106 kHz
• The converter will operate in the calculated series
resonant frequency for Vbulk = 360 VDC
As demonstrated, the converter will operate above the
calculated theoretical series resonant frequency for nominal
bulk voltage and full load. The ZCS capability is thus not
achieved on the secondary diodes. Also the needed
operating frequency range of this converter is very narrow,
which is beneficial for LCD TV application - EMI radiation
and filtering.
Gain characteristic of this converter for Iload = 0.10 * Imax
and same parameters as above is in Figure 4.
Figure 2. Transformer Connection During Gain
Characteristics Measurements
The resonant tank quality factor of Q = 4.3 (that
corresponds to resonant capacitor Cr = 33 nF) has been
selected for this design in order to narrow operating
frequency range of the converter.
The measured full load gain characteristic for the selected
resonant tank components and 24 V output can be observed
in Figure 3.
The gains that are needed to assure line regulation can be
calculated using Equations 2 through 4:
ǒ Ǔ2 Vout ) Vf 2(24 ) 0.6)
Gmin +
Vinmax
+
425
+ 0.116
(eq. 2)
ǒ Ǔ2 Vout ) Vf 2(24 ) 0.6)
Gnom +
Vinnom
+
395
+ 0.125
(eq. 3)
ǒ Ǔ2 Vout ) Vf 2(24 ) 0.6)
Gmax +
Vinmax
+
350
+ 0.141
(eq. 4)
Theoretical series resonant frequency can also be
calculated based on the Equation 5:
fr1
+
2
@
p
@
1
ǸLr
@
Cr
(eq. 5)
+ 1 + 81.7ĂkHz
2 @ 3.14 @ Ǹ115 @ 10- 6 @ 33 @ 10- 9
Now, when looking back to the gain characteristic in
Figure 3, the operating conditions of the full loaded LLC
power stage can be read:
• The nominal operating frequency of such converter is
94.6 kHz (for nominal bulk voltage)
0.21
0.19
0.17
0.15
0.13
Gmax
0.125
Operating Point for
Vbulk = 395 V and
Full Load
0.11
0.09
Gmin
0.07
0.05
2.0E+04 6.0E+04 1.0E+05 1.4E+05 1.8E+05
FREQUENCY (Hz)
Figure 3. FLLC Converter Gain Characteristic
for Full Load and Q = 4.3 (Cr = 33 nF)
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2 0.125
Operating Point for
Vbulk = 395 V and
Full Load
0
2.E+04
100kHz
6.E+04 1.E+05
1.E+05
2.E+05
FREQUENCY (Hz)
Figure 4. LLC Converter gain Characteristic
for 10 % Load Conditions
http://onsemi.com
5
5 Page 
AND8293/D
Figure 21. Top Side (Top View)
http://onsemi.com
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet AND8293D.PDF ] | |
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