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PDF EMP8731-06VF05NRR Data sheet ( Hoja de datos )

Número de pieza EMP8731-06VF05NRR
Descripción 300mA CMOS Linear Regulator
Fabricantes Elite Semiconductor 
Logotipo Elite Semiconductor Logotipo



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No Preview Available ! EMP8731-06VF05NRR Hoja de datos, Descripción, Manual

ESMT
Preliminary
EMP8731
High-PSRR, Low-Noise, 300mA CMOS Linear
Regulator with 3 Types of Output Select
General Description
The EMP8731 features ultra-high power supply
rejection ratio, low output voltage noise, low
dropout voltage, low quiescent current and fast
transient response. It guarantees delivery of 300mA
output current and supports 3 types of output
voltages via ADJ pin.
Based on its low quiescent current consumption and
its less than 1µA shutdown mode of logical operation,
the EMP8731 is ideal for battery-powered
applications. The high power supply rejection ratio
of the EMP8731 holds well for low input voltages
typically encountered in battery-operated systems.
The regulator is stable with small ceramic capacitive
loads (2.2µF typical). The EMP8731 is available in
miniature SOT-23-5 packages.
Applications
Wireless handsets
PCMCIA cards
DSP core power
Hand-held instruments
Battery-powered systems
Portable information appliances
Features
300mA guaranteed output current
60dB typical PSRR at 1kHz
130µV (VOUT=3.0V) RMS output voltage noise
(10Hz to 100kHz)
264mV (VOUT=2.8V) typical dropout at 300mA
60µA typical quiescent current
Less than 1µA typical shutdown mode
Fast line and load transient response
2.2V to 5.5V input range
Auto-discharge during chip disable
60µs typical turn-on time
Stable with small ceramic output capacitors
Over temperature and over current
protection
±2% output voltage tolerance
Typical Application
Elite Semiconductor Memory Technology Inc.
Publication Date: Oct. 2013
Revision: 0.3
1/13

1 page




EMP8731-06VF05NRR pdf
ESMT
Preliminary
EMP8731
Note 1: Absolute Maximum ratings indicate limits beyond which damage may occur. Electrical specifications do not
apply when operating the device outside of its rated operating conditions.
Note 2: All voltages are with respect to the potential at the ground pin.
Note 3: θJA is measured in the natural convection at TA=25on a high effective thermal conductivity test board (2
layers, 2S0P).
Note 4: θJC represents the resistance to the heat flows the chip to package top case.
Note 5: Condition does not apply to input voltages below 2.2V since this is the minimum input operating voltage.
Note 6: Dropout voltage is measured by reducing VIN until VOUT drops 100mV from its nominal value at VIN –VOUT = 1V.
Dropout voltage does not apply to the regulator versions with VOUT less than 2.2V.
Note 7: Turn-off time is time measured between the enable input just decreasing below VIL and the output voltage just
decreasing to 10% of its nominal value.
Note 8: Maximum Power dissipation for the device is calculated using the following equations:
PD
TJ(MAX)
θJA
-
TA
Where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the
junction-to-ambient thermal resistance. E.g. for the SOT-23-5 packageθJA = 152°C/W, TJ (MAX) = 150°C and
using TA = 25°C, the maximum power dissipation is found to be 0.82W. The derating factor (-1/θJA) =
-6.6mW/°C, thus below 25°C the power dissipation figure can be increased by 6.6mW per degree, and
similarity decreased by this factor for temperatures above 25°C.
Note 9: Typical Values represent the most likely parametric norm
Elite Semiconductor Memory Technology Inc.
Publication Date: Oct. 2013
Revision: 0.3
5/13

5 Page





EMP8731-06VF05NRR arduino
ESMT
Package Outline Drawing
SOT-23-5
5
4
Preliminary
EMP8731
E E1
DETAIL A
PIN#1
MARK
13
TOP VIEW
D
13
be
SIDE VIEW
A
A1
c
L
DETAIL A
Symbol
A
A1
b
c
D
E
E1
e
L
Dimension in mm
Min. Max.
0.90 1.45
0.00 0.15
0.30 0.50
0.08 0.25
2.70 3.10
1.40 1.80
2.60 3.00
0.95 BSC
0.30 0.60
Elite Semiconductor Memory Technology Inc.
Publication Date: Oct. 2013
Revision: 0.3
11/13

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