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PDF AD8436 Data sheet ( Hoja de datos )

Número de pieza AD8436
Descripción True RMS-to-DC Converter
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo




1. AD8436






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Data Sheet
FEATURES
Delivers true rms or average rectified value of ac waveform
Fast settling at all input levels
Accuracy: ±10 μV ± 0.25% of reading (B grade)
Wide dynamic input range
100 μV rms to 3 V rms (8.5 V p-p) full-scale input range
Larger inputs with external scaling
Wide bandwidth:
1 MHz for −3 dB (300 mV)
65 kHz for additional 1% error
Zero converter dc output offset
No residual switching products
Specified at 300 mV rms input
Accurate conversion with crest factors up to 10
Low power: 300 µA typical at ±2.4 V
High-Z FET separately powered input buffer
RIN ≥ 1012 Ω, CIN 2 pF
Precision dc output buffer
Wide power supply voltage range
Dual: ±2.4 V to ±18 V; single: 4.8 V to 36 V
4 mm × 4 mm LFCSP and 8 mm × 6 mm QSOP packages
ESD protected
GENERAL DESCRIPTION
The AD8436 is a new generation, translinear precision, low
power, true rms-to-dc converter loaded with options. It
computes a precise dc equivalent of the rms value of ac wave-
forms, including complex patterns such as those generated by
switch mode power supplies and triacs. Its accuracy spans a
wide range of input levels (see Figure 2) and temperatures.
The ensured accuracy of ±0.5% and 10 µV output offset
result from the latest Analog Devices, Inc., technology. The
crest factor error is <0.5% for CF values between 1 and 10.
The AD8436 delivers true rms results at less cost than
misleading peak, averaging, or digital solutions. There is no
programming expense or processor overhead to consider, and
the 4 mm × 4 mm package easily fits into tight applications.
On-board buffer amplifiers enable the widest range of options
for any rms-to-dc converter available, regardless of cost. For
minimal applications, only a single external averaging capacitor
is required. The built-in high impedance FET buffer provides
an interface for external attenuators, frequency compensation,
or driving low impedance loads. A matched pair of internal
resistors enables an easily configurable gain-of-two or more,
extending the usable input range even lower. The low power,
precision input buffer makes the AD8436 attractive for use in
portable multi-meters and other battery-powered applications.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
Low Cost, Low Power,
True RMS-to-DC Converter
AD8436
FUNCTIONAL BLOCK DIAGRAM
CAVG CCF
SUM
RMS
AD8436
8kΩ
RMS CORE
10pF
VCC
100kΩ
100kΩ
VEE
16kΩ
IGND
OGND
OUT
IBUFGN
IBUFIN–
IBUFIN+
10kΩ
10kΩ
+ FET OP AMP
IBUFOUT
OBUFIN+
OBUFIN–
16kΩ
+
DC BUFFER
Figure 1.
OBUFOUT
The precision dc output buffer minimizes errors when driving
low impedance loads with extremely low offset voltages, thanks
to internal bias current cancellation. Unlike digital solutions, the
AD8436 has no switching circuitry limiting performance at high or
low amplitudes (see Figure 2). A usable response of <100 µV and
>3 V extends the dynamic range with no external scaling,
accommodating demanding low level signal conditions and
allowing ample overrange without clipping.
GREATER INPUT DYNAMIC RANGE
AD8436
ΔΣ SOLUTION
100µV
1mV
10mV
100mV
1V 3V
Figure 2. Usable Dynamic Range of the AD8436 vs. ∆Σ
The AD8436 operates from single or dual supplies of ±2.4 V
(4.8 V) to ±18 V (36 V). A and J grades are available in a
compact 4 mm × 4 mm, 20-lead chip-scale package; A and B
grades are available in a 20-lead QSOP package. The operating
temperature ranges are −40°C to 125°C for A and B grades and
0°C to 70°C for J grade.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




AD8436 pdf
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD8436
SUM
1
DNC
20
CAVG
CCF
VCC IBUFV+
16
15
OBUFV+
RMS
IBUFOUT
PIN 1
INDICATOR
AD8436
TOP VIEW
(Not to Scale)
OBUFOUT
OBUFIN–
IBUFIN–
OBUFIN+
IBUFIN+
5
IGND
11
6
IBUFGN DNC
OGND
OUT
10
VEE
NOTES
1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED PAD CONNECTION IS OPTIONAL.
Figure 3. Pin Configuration, Top View, CP-20-10
Table 3. Pin Function Descriptions, CP-20-10
Pin No. Mnemonic Description
1 DNC Do Not Connect. Used for factory test.
2 RMS AC Input to the RMS Core.
3 IBUFOUT FET Input Buffer Output Pin.
4
IBUFIN–
FET Input Buffer Inverting Input Pin.
5
IBUFIN+
FET Input Buffer Noninverting Input Pin.
6
IBUFGN
Optional 10 kΩ Precision Gain Resistor.
7 DNC Do Not Connect. Used for factory test.
8
OGND
Internal 16 kΩ I-to-V Resistor.
9 OUT RMS Core Voltage or Current Output.
10 VEE
Negative Supply Rail.
11 IGND
Half Supply Node.
12 OBUFIN+ Output Buffer Noninverting Input Pin.
13 OBUFIN− Output Buffer Inverting Input Pin.
14 OBUFOUT Output Buffer Output Pin.
15 OBUFV+ Power Pin for the Output Buffer.
16
IBUFV+
Power Pin for the Input Buffer.
17 VCC
Positive Supply Rail for the RMS Core.
18 CCF
Connection for Crest Factor Capacitor.
19 CAVG Connection for Averaging Capacitor.
20 SUM
Summing Amplifier Input Pin.
EP DNC
Exposed Pad Connection to Ground
Pad Optional.
SUM 1
20 CAVG
DNC 2
19 CCF
RMS 3
IBUFOUT 4
IBUFIN– 5
AD8436
TOP VIEW
(Not to Scale)
18 VCC
17 IBUFV+
16 OBUFV+
IBUFIN+ 6
15 OBUFOUT
IBUFGN 7
14 OBUFIN–
DNC 8
13 OBUFIN+
OGND 9
12 IGND
OUT 10
11 VEE
NOTES
1. DNC = DO NOT CONNECT.
DO NOT CONNECT TO THIS PIN.
Figure 4. Pin Configuration, RQ-20
Table 4. Pin Function Descriptions, RQ-20
Pin No. Mnemonic Description
1 SUM Summing Amplifier Input Pin.
2 DNC Do Not Connect. Used for factory test.
3 RMS AC Input to the RMS Core.
4 IBUFOUT FET Input Buffer Output Pin.
5
IBUFIN–
FET Input Buffer Inverting Input Pin.
6
IBUFIN+
FET Input Buffer Noninverting Input Pin.
7
IBUFGN
Optional 10 kΩ Precision Gain Resistor.
8 DNC Do Not Connect. Used for factory test.
9
OGND
Internal 16 kΩ I-to-V Resistor.
10 OUT
RMS Core Voltage or Current Output.
11 VEE
Negative Supply Rail.
12 IGND
Half Supply Node.
13 OBUFIN+ Output Buffer Noninverting Input Pin.
14 OBUFIN− Output Buffer Inverting Input Pin.
15 OBUFOUT Output Buffer Output Pin.
16 OBUFV+ Power Pin for the Output Buffer.
17
IBUFV+
Power Pin for the Input Buffer.
18 VCC
Positive Supply Rail for the RMS Core.
19 CCF
Connection for Crest Factor Capacitor.
20 CAVG Connection for Averaging Capacitor.
Rev. B | Page 5 of 24

5 Page





AD8436 arduino
Data Sheet
The 16 kΩ resistor in the output converts the output current to
a dc voltage that can be connected to the output buffer or to the
circuit that follows. The output appears as a voltage source in
series with 16 kΩ. If a current output is desired, the resistor
connection to ground is left open and the output current is
applied to a subsequent circuit, such as the summing node of
a current summing amplifier. Thus, the core has both current
and voltage outputs, depending on the configuration. For a
voltage output with 0 Ω source impedance, use the output
buffer. The offset voltage of the buffer is 25 μV or 50 μV,
depending on the grade.
FET Input Buffer
Because the V-to-I input resistor value of the AD8436 rms core
is 8 kΩ, a high input impedance buffer is often used between
rms-dc converters and finite impedance sources. The optional
JFET input op amp minimizes attenuation and uncouples
common input amenities, such as resistive voltage dividers or
resistors used to terminate current transformers. The wide
bandwidth of the FET buffer is well matched to the rms core
bandwidth so that no information is lost due to serial band-
width effects. Although the input buffer consumes little current,
the buffer supply is independently accessible and can be
disconnected to reduce power.
Optional matched 10 kΩ input and feedback resistors are provided
on chip. Consult the Applications Information section to learn
how these resistors can be used. The 3 dB bandwidth of the input
buffer is 2.7 MHz at 10 mV rms input and approximately 1.5 MHz
at 1 V rms. The amplifier gain and bandwidth are sufficient for
applications requiring modest gain or response enhancement to
a few hundred kilohertz (kHz), if desired. Configurations of the
input buffer are discussed in the Applications Information
section.
Precision Output Buffer
The precision output buffer is a bipolar input amplifier, laser
trimmed to cancel input offset voltage errors. As with the input
buffer, the supply current is very low (<50 μA, typically), and the
power can be disconnected for power savings if the buffer is not
needed. Be sure that the noninverting input is also disconnected
from the core output (OUT) if the buffer supply pin is discon-
nected. Although the input current of the buffer is very low,
a laser-trimmed 16 kΩ resistor, connected in series with the
inverting input, offsets any self-bias offset voltage.
AD8436
The output buffer can be configured as a single or two-pole low-
pass filter using circuits shown in the Applications Information
section. Residual output ripple is reduced, without affecting the
converted dc output. As the response approaches the low
frequency end of the bandwidth, the ripple rises, dependent on
the value of the averaging capacitor. Figure 27 shows the effects of
four combinations of averaging and filter capacitors. Although
the filter capacitor reduces the ripple for any given frequency, the
dc error is unaffected. Of course, a larger value averaging
capacitor can be selected, at a larger cost. The advantage of using
a low-pass filter is that a small value of filter capacitor, in
conjunction with the 16 kΩ output resistor, reduces ripple and
permits a smaller averaging capacitor, effecting a cost savings.
The recommended capacitor values for operation to 40 Hz are
10 µF for averaging and 3.3 µF for filter.
Dynamic Range
The AD8436 is a translinear rms-to-dc converter with exceptional
dynamic range. Although accuracy varies slightly more at the
extreme input values, the device still converts with no spurious
noise or dropout. Figure 25 is a plot of the rms/dc transfer function
near zero voltage. Unlike processor or other solutions, residual
errors at very low input levels can be disregarded for most
applications.
30
20
10
0
–30
ΔΣ OR OTHER DIGITAL
SOLUTIONS CANNOT
WORK AT ZERO
VOLTS
AD8436
SOLUTION
–20 –10 0 10 20
INPUT VOLTAGE (mV DC)
Figure 25. DC Transfer Function near Zero
30
Rev. B | Page 11 of 24

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