ADM4855 Datasheet PDF - Analog Devices
| Part Number | ADM4855 | |
| Description | Half-Duplex and Full-Duplex RS-485/RS-422 Transceivers | |
| Manufacturers | Analog Devices | |
| Logo |  |
|
|
There is a preview and ADM4855 download ( pdf file ) link at the bottom of this page. Total 16 Pages | ||
Preview 1 page No Preview Available !
5 V, Slew-Rate Limited, Half-Duplex and
Full-Duplex RS-485/RS-422 Transceivers
ADM4850/ADM4851/ADM4852/ADM4853/ADM4854/ADM4855/ADM4856/ADM4857
FEATURES
EIA RS-485-/RS-422-compliant
Data rate options
ADM4850/ADM4854: 115 kbps
ADM4851/ADM4855: 500 kbps
ADM4852/ADM4856: 2.5 Mbps
ADM4853/ADM4857: 10 Mbps
Half- and full-duplex options
Reduced slew rates for low EMI
True fail-safe receiver inputs
5 μA (maximum) supply current in shutdown mode
Up to 256 transceivers on one bus
Outputs high-Z when disabled or powered off
−7 V to +12 V bus common-mode range
Thermal shutdown and short-circuit protection
Pin-compatible with the MAX308x
Specified over the −40°C to +85°C temperature range
Available in 8-lead SOIC, LFCSP, and MSOP packages
Qualified for automotive applications
APPLICATIONS
Low power RS-485 applications
EMI-sensitive systems
DTE-DCE interfaces
Industrial control
Packet switching
Local area networks
Level translators
GENERAL DESCRIPTION
The ADM4850/ADM4851/ADM4852/ADM4853/ADM4854/
ADM4855/ADM4856/ADM4857 are differential line transceivers
suitable for high speed half- and full-duplex data communication on
multipoint bus transmission lines. They are designed for balanced
data transmission and comply with EIA Standards RS-485 and
RS-422. The ADM4850/ADM4851/ADM4852/ADM4853 are half-
duplex transceivers that share differential lines and have separate
enable inputs for the driver and receiver. The full-duplex
ADM4854/ADM4855/ADM4856/ADM4857 transceivers have
dedicated differential line driver outputs and receiver inputs.
The parts have a 1/8-unit-load receiver input impedance, which
allows up to 256 transceivers on one bus. Because only one driver
should be enabled at any time, the output of a disabled or pow-
ered-down driver is three-stated to avoid overloading the bus.
The receiver inputs have a true fail-safe feature, which ensures
a logic high output level when the inputs are open or shorted.
This guarantees that the receiver outputs are in a known state
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAMS
VCC
ADM4850/ADM4851/
ADM4852/ADM4853
RO R
RE A
DE B
DI D
GND
Figure 1.
VCC
ADM4854/ADM4855/
ADM4856/ADM4857
RO R
A
B
DI D
Z
Y
GND
Figure 2.
before communication begins and when communication ends.
The driver outputs are slew-rate limited to reduce EMI and data
errors caused by reflections from improperly terminated buses.
Excessive power dissipation caused by bus contention or by output
shorting is prevented with a thermal shutdown circuit.
The parts are fully specified over the commercial and industrial
temperature ranges and are available in 8-lead SOIC, LFCSP
(ADM4850/ADM4851/ADM4852/ADM4853), and MSOP
(ADM4850 only) packages.
Table 1. Selection Table
Part No.
Half-/Full-Duplex
ADM4850
Half
ADM4851
Half
ADM4852
Half
ADM4853
Half
ADM4854
Full
ADM4855
Full
ADM4856
Full
ADM4857
Full
Data Rate
115 kbps
500 kbps
2.5 Mbps
10 Mbps
115 kbps
500 kbps
2.5 Mbps
10 Mbps
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2004–2012 Analog Devices, Inc. All rights reserved.
|
| |
 
ADM4850/ADM4851/ADM4852/ADM4853/ADM4854/ADM4855/ADM4856/ADM4857
ADM4852/ADM4856 TIMING SPECIFICATIONS
VCC = 5 V ± 5%, TA = TMIN to TMAX, unless otherwise noted.
Table 5.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay, tPLH, tPHL
Skew, tSKEW
Rise/Fall Times, tR, tF
Enable Time, tZH
Disable Time, tZL
Enable Time from Shutdown
RECEIVER
Propagation Delay, tPLH, tPHL
Differential Skew, tSKEW
Enable Time
Disable Time
Enable Time from Shutdown
Time to Shutdown
Min Typ Max Unit Test Conditions/Comments
2.5 Mbps
50
180 ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
50 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
140 ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
180 ns
RL = 500 Ω, CL = 100 pF, see Figure 21, ADM4852
180 ns
RL = 500 Ω, CL = 15 pF, see Figure 21, ADM4852
4000
ns RL = 500 Ω, CL = 100 pF, see Figure 21, ADM4852
55
190 ns
CL = 15 pF, see Figure 22
50 ns CL = 15 pF, see Figure 22
5 50 ns RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4852
20 50 ns RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4852
4000
ns RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4852
50
330
3000
ns
ADM48521
1 The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
ADM4853/ADM4857 TIMING SPECIFICATIONS
VCC = 5 V ± 5%, TA = TMIN to TMAX, unless otherwise noted.
Table 6.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay, tPLH, tPHL
Skew, tSKEW
Rise/Fall Times, tR, tF
Enable Time, tZH
Disable Time, tZL
Enable Time from Shutdown
RECEIVER
Propagation Delay, tPLH, tPHL
Differential Skew, tSKEW
Enable Time
Disable Time
Enable Time from Shutdown
Time to Shutdown
Min Typ Max Unit Test Conditions/Comments
10 Mbps
0 30 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
10 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
30 ns RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
35 ns RL = 500 Ω, CL = 100 pF, see Figure 21, ADM4853
35 ns RL = 500 Ω, CL = 15 pF, see Figure 21, ADM4853
4000
ns RL = 500 Ω, CL = 100 pF, see Figure 21, ADM4853
55
190 ns
CL = 15 pF, see Figure 22
30 ns CL = 15 pF, see Figure 22
5 50 ns RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4853
20 50 ns RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4853
4000
ns RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4853
50
330
3000
ns
ADM48531
1 The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
Rev. D | Page 5 of 16
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for ADM4855 electronic component. |
| Information | Total 16 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ ADM4855.PDF Datasheet ] | |
Share Link :
Electronic Components Distributor
|
An electronic components distributor is a company that sources, stocks, and sells electronic components to manufacturers, engineers, and hobbyists. |
| SparkFun Electronics | Allied Electronics | DigiKey Electronics | Arrow Electronics |
| Mouser Electronics | Adafruit | Newark | Chip One Stop |
Featured Datasheets
| Part Number | Description | MFRS |
| ADM485 | The function is 5V Low Power EIA RS-485 Transceiver. Analog Devices | |
| ADM4850 | The function is Half-Duplex and Full-Duplex RS-485/RS-422 Transceivers. Analog Devices | |
| ADM4851 | The function is Half-Duplex and Full-Duplex RS-485/RS-422 Transceivers. Analog Devices | |
Semiconductors commonly used in industry:
1N4148 |
BAW56 |
1N5400 |
NE555 | | ||
Quick jump to:
ADM4
1N4
2N2
2SA
2SC
74H
BC
HCF
IRF
KA | ||