Datenblatt-pdf.com


AD8341 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD8341
Beschreibung 1.5GHz to 2.4GHz RF Vector Modulator
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 20 Seiten
AD8341 Datasheet, Funktion
Data Sheet
FEATURES
Cartesian amplitude and phase modulation
1.5 GHz to 2.4 GHz frequency range
Continuous magnitude control of −4.5 dB to −34.5 dB
Continuous phase control of 0° to 360°
Output third-order intercept 17.5 dBm
Output 1 dB compression point 8.5 dBm
Output noise floor −150.5 dBm/Hz @ full gain
Adjustable modulation bandwidth up to 230 MHz
Fast output power disable
4.75 V to 5.25 V single-supply voltage
APPLICATIONS
RF PA linearization/RF predistortion
Amplitude and phase modulation
Variable attenuators and phase shifters
CDMA2000, WCDMA, GSM/EDGE linear power amplifiers
Smart antennas
GENERAL DESCRIPTION
The AD8341 vector modulator performs arbitrary amplitude
and phase modulation of an RF signal. Since the RF signal path
is linear, the original modulation is preserved. This part can be
used as a general-purpose RF modulator, a variable attenua-
tor/phase shifter, or a remodulator. The amplitude can be
controlled from a maximum of −4.5 dB to less than −34.5 dB,
and the phase can be shifted continuously over the entire 360°
range. For maximum gain, the AD8341 delivers an OP1dB of
8.5 dBm, an OIP3 of 17.5 dBm, and an output noise floor of
−150.5 dBm/Hz, independent of phase. It operates over a
frequency range of 1.5 GHz to 2.4 GHz.
The baseband inputs in Cartesian I and Q format control the
amplitude and phase modulation imposed on the RF input
signal. Both I and Q inputs are dc-coupled with a ±500 mV
differential full-scale range. The maximum modulation band-
width is 230 MHz, which can be reduced by adding external
capacitors to limit the noise bandwidth on the control lines.
1.5 GHz to 2.4 GHz
RF Vector Modulator
AD8341
FUNCTIONAL BLOCK DIAGRAM
RFIP
RFIM
VPRF
QBBP QBBM
90°
VPS2
0°
CMOP
IBBP IBBM
Figure 1.
DSOP
RFOP
RFOM
Both the RF inputs and outputs can be used differentially or
single-ended and must be ac-coupled. The RF input and output
impedances are nominally 50 Ω over the operating frequency
range. The DSOP pin allows the output stage to be disabled
quickly in order to protect subsequent stages from overdrive.
The AD8341 operates off supply voltages from 4.75 V to 5.25 V
while consuming approximately 125 mA.
The AD8341 is fabricated on Analog Devices’ proprietary, high
performance 25 GHz SOI complementary bipolar IC process. It
is available in a 24-lead, Pb-free LFCSP package and operates
over a −40°C to +85°C temperature range. Evaluation boards
are available.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no re-
sponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2004–2012 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






AD8341 Datasheet, Funktion
AD8341
TYPICAL PERFORMANCE CHARACTERISTICS
0
PHASE SETPOINT = 0
–5
PHASE SETPOINT = 270
–10
–15
PHASE SETPOINT = 180
–20
PHASE SETPOINT = 90
–25
–30
–35
–40
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
GAIN SETPOINT
Figure 3. Gain Magnitude vs. Gain Setpoint at Different
Phase Setpoints, RF Frequency = 1900 MHz
6
PHASE SETPOINT = 315
5
4
PHASE SETPOINT = 270
3
PHASE SETPOINT = 0
2
PHASE SETPOINT = 45
1
0
–1
PHASE SETPOINT = 225
–2
–3
PHASE SETPOINT = 90
–4
PHASE SETPOINT = 180
–5
–6
–7
–8
0
PHASE SETPOINT = 135
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
GAIN SETPOINT
Figure 4. Gain Conformance Error vs. Gain Setpoint at
Different Phase Setpoints, RF Frequency = 1900 MHz
–2
–4
–6
–8
–10
–12
–14
–16
–18
–20
–22
–24
–26
–28
0
GAIN SETPOINT = 1.0
GAIN SETPOINT = 0.5
GAIN SETPOINT = 0.25
GAIN SETPOINT = 0.1
45 90 135 180 225 270 315 360
PHASE SETPOINT (Degrees)
Figure 5. Gain Magnitude vs. Phase Setpoint at Different
Gain Setpoints, RF Frequency = 1900 MHz
Data Sheet
1.0
GAIN SETPOINT = 1.0
0.5
GAIN SETPOINT = 0.5
0
–0.5
–1.0
–1.5
–2.0
GAIN SETPOINT = 0.25
–2.5
–3.0
–3.5
–4.0
GAIN SETPOINT = 0.1
–4.5
0
45 90 135 180 225 270 315 360
PHASE SETPOINT (Degrees)
Figure 6. Gain Conformance Error vs. Phase Setpoint at
Different Gain Setpoints, RF Frequency = 1900 MHz
360
315
GAIN SETPOINT = 0.25
270
GAIN SETPOINT = 0.5
225
GAIN SETPOINT = 0.1
180
GAIN SETPOINT = 1.0
135
90
45
0
0 45 90 135 180 225 270 315 360
PHASE SETPOINT (Degrees)
Figure 7. Phase vs. Phase Setpoint at
Different Gain Setpoints, RF Frequency = 1900 MHz
25
GAIN SETPOINT = 0.1
20
15
GAIN SETPOINT = 0.25
10
5
0
GAIN SETPOINT = 0.5
GAIN SETPOINT = 1.0
–5
–10
–15
0 45 90 135 180 225 270 315 360
PHASE SETPOINT (Degrees)
Figure 8. Phase Error vs. Phase Setpoint at Different Gain Setpoints,
RF Frequency = 1900 MHz
Rev. A | Page 6 of 20

6 Page









AD8341 pdf, datenblatt
AD8341
APPLICATIONS
USING THE AD8341
The AD8341 is designed to operate in a 50 Ω impedance
system. Figure 30 illustrates an example where the RF input is
driven in a single-ended fashion while the differential RF out-
put is converted to a single-ended output with an RF balun. The
baseband controls for the I and Q channels are typically driven
from differential DAC outputs. The power supplies, VPRF and
VPS2, should be bypassed appropriately with 0.1 µF and 100 pF
capacitors. Low inductance grounding of the CMOP and CMRF
common pins is essential to prevent unintentional peaking of
the gain.
RF INPUT AND MATCHING
The input impedance of the AD8341 is defined by the charac-
teristics of the polyphase network. The capacitive component of
the network causes its impedance to roll-off with frequency
albeit at a rate slower than 6 dB/octave. By using matching
inductors on the order of 1.2 nH in series with each of the RF
inputs, RFIP and RFIM, a 50 Ω match is achieved with a return
Data Sheet
loss of >10 dB over the operating frequency range. Different
matching inductors can improve matching over a narrower
frequency range. The single-ended and differential input
impedances are exactly the same.
100pF 1.2nH
100pF 1.2nH
RF
50
RFIM
~1VDC
RC
PHASE
RFIP
Figure 29. RF Input Interface to the AD8341 Showing
Coupling Capacitors and Matching Inductors
The RFIP and RFIM should be ac-coupled through low loss
series capacitors as shown in Figure 29. The internal dc levels
are at approximately 1 V. For single-ended operation, one input
is driven by the RF signal while the other input is ac grounded.
VP
IBBM
IBBP
VP
RF
INPUT
VP
QBBP
QBBM
C2
100pF
C12
(SEE TEXT)
C8
0.1µF
C7
100pF
IFLP
VPRF
C6 L3
100pF 1.2nH
CMRF
RFIM
C5
100pF
L4
1.2nH
RFIP
CMRF
C3
0.1µF
C4
100pF
VPRF
QFLP
AD8341
C11
(SEE TEXT)
C1
0.1µF
DSOP
CMOP
CMOP
RFOM
RFOP
CMOP
CMOP
VPS2
C10
0.1µF
C9
100pF
VP
A
OUTPUT
DISABLE
B
C17
100pF ETC1-1-13
L1
120nH
C18
L2 100pF
120nH
C14
0.1µF
VP
Figure 30. Basic Connections
RF
OUTPUT
Rev. A | Page 12 of 20

12 Page





SeitenGesamt 20 Seiten
PDF Download[ AD8341 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
AD834500 MHz Four-Quadrant MultiplierAnalog Devices
Analog Devices
AD8340RF Vector ModulatorAnalog Devices
Analog Devices
AD83411.5GHz to 2.4GHz RF Vector ModulatorAnalog Devices
Analog Devices
AD8342Active Receive Mixer Low Frequency to 3.8 GHzAnalog Devices
Analog Devices
AD8343DC-to-2.5 GHz High IP3 Active MixerAnalog Devices
Analog Devices

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche