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KS0107B
64CH COMMON DRIVER FOR DOT MATRIX LCD
INTRODUCTION
The KS0107B is an LCD driver LSI with 64 channel outputs for
dot matrix liquid crystal graphic display systems.
This device provides 64 shift registers and 64 output drivers.
It generates the timing signal to control the KS0108B ( 64
channel segment driver).
The KS0107B is fabricated by low power CMOS high voltage
process technology, and is composed of the liquid crystal display
system in combination with the KS0108B (64 channel segment
driver).
100 QFP-1420C
FEATURES
• Dot matrix LCD common driver with 64 channel output
• 64-bit shift register at internal LCD driver circuit
• Internal timing generator circuit for dynamic display
• Selection of master/slave mode
• Applicable LCD duty : 1/48, 1/64, 1/96, 1/128
• Power supply voltage: + 5V ±10%
• LCD driving voltage : 8V~17V (VDD-VEE)
• Interface
Driver
COMMON
SEGMENT
Other KS0107B
KS0108B
Controller
MPU
• High voltage CMOS process
• 100QFP / 100TQFP and bare chip available
100 TQFP-1414
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KS0107B
64CH COMMON DRIVER FOR DOT MATRIX LCD
MAXIMUM ABSOLUTE LIMIT
Characteristic
Operating Voltage
Supply Voltage
Driver Supply Voltage
Operating Temperature
Storage Temperature
Symbol
VDD
VEE
VB
VLCD
TOPR
TSTG
Value
-0.3~+7.0
VDD-19.0~VDD+0.3
-0.3~VDD+0.3
VEE-0.3~VDD+0.3
-30~+85
-55~+125
*1. Based on VSS=0 V
*2. Applies to input terminals and I/O terminals at high impedance.
(Except V0L(R), V1L(R), V4L(R) and V5L(R))
*3. Applies to V0L(R), V1L(R), V4L(R) and V5L(R).
*4. Voltage level: VDD ≥ V0L= V0R ≥ V1L= V1R ≥ V4L= V4R ≥ V5L= V5R ≥ VEE.
Unit
V
V
V
V
°C
°C
Note
*1
*4
*1,2
*3,4
-
-
ELECTRICAL CHARACTERISTICS
DC Characteristics (VDD=+5V ±10%, VSS=0V, |VDD-VEE |=8~17V, Ta= -30 ~ +85°C)
Characteristic
Symbol
condition
Min Typ
Input
High
VIH
-
0.7VDD
-
Voltage
Low
VIL
VSS -
Output
High
VOH
IOH=-0.4 mA
VDD-0.4
-
Voltage
Low
VOL IOL=0.4 mA
--
Input Leakage Current
ILKG
VIN=VDD~VSS
-1.0
-
OSC Frequency
fOSC Rf=47 kΩ ± 2% 315 450
Cf=20pf ± 5%
On Resistance
(Vdiv-Ci)
RON
VDD-VEE =17V
Load current =
-
-
±150µA
Operating Current IDD1 Master mode
1/128 Duty
-
-
IDD2 Slave mode - -
1/128 Duty
Supply Current
IEE Master mode
1/128 Duty
-
-
Operating
fop1 Master mode 50
External clock
-
Frequency
fop2 Slave mode 0.5 -
Max
VDD
0.3VDD
-
0.4
1.0
585
1.5
1.0
200
100
600
1500
Unit
V
V
µA
KHz
kΩ
Note
*1
*2
*1
mA *3
µA *4
*5
KHz
*1. Applies to input terminals FS, DS1, DS2, CR, SHL, MS and PCLK2 and I/O terminals DIO1, DIO2, M and CL2 in the input
state.
*2. Applies to output terminals CLK1, CLK2 and FRM and I/O terminals DIO1, DIO2, M and CL2 in the output state.
*3. This value is specified at about the current flowing through VSS.
Internal oscillation circuit: Rf=47 kΩ, Cf=20 pF
Each terminal of DS1, DS2, FS, SHL and MS is connected to VDD and out is no load.
*4. This value is specified at about the current flowing through VSS.
Each terminal of DS1, DS2, FS, SHL, PCLK2 and CR is connected to VDD, and MS is connected to VSS. CL2,
M, DIO1 is external clock.
*5. This value is specified at about the current flowing through VEE.
Don’t connect to VLCD (V1~V5).
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