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C8051F921 Schematic ( PDF Datasheet ) - Silicon Laboratories

Teilenummer C8051F921
Beschreibung 10-Bit ADC MCU
Hersteller Silicon Laboratories
Logo Silicon Laboratories Logo 




Gesamt 30 Seiten
C8051F921 Datasheet, Funktion
C8051F93x-C8051F92x
Single/Dual Battery, 0.9–3.6 V, 64/32 kB, SmaRTClock, 10-Bit ADC MCU
Supply Voltage 0.9 to 3.6 V
- One-Cell Mode supports 0.9 to 1.8 V operation
- Two-Cell Mode supports 1.8 to 3.6 V operation
- Built-in dc-dc converter with 1.8 to 3.3 V output for
use in one-cell mode
- Built-in LDO regulator allows a high analog supply
voltage and low digital core voltage
- 2 built-in supply monitors (brownout detectors)
10-Bit Analog to Digital Converter
- ±1 LSB INL; no missing codes
- Programmable throughput up to 300 ksps
- Up to 23 external inputs
- On-Chip Voltage Reference
- On-Chip PGA allows measuring voltages up to twice
the reference voltage
- 16-bit Auto-Averaging Accumulator with Burst Mode
provides increased ADC resolution
- Data dependent windowed interrupt generator
- Built-in temperature sensor
Two Comparators
- Programmable hysteresis and response time
- Configurable as wake-up or reset source
- Up to 23 Capacitive Touch Sense Inputs
6-Bit Programmable Current Reference
- Up to ±500 µA. Can be used as a bias or for
generating a custom reference voltage
On-Chip Debug
- On-chip debug circuitry facilitates full-speed, non-
intrusive in-system debug (no emulator required)
- Provides breakpoints, single stepping
- Inspect/modify memory and registers
- Complete development kit
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- Expanded interrupt handler
Memory
- 4352 bytes internal data RAM (256 + 4096)
- 64 kB (‘F93x) or 32 kB (‘F92x) Flash; In-system pro-
grammable in 1024-byte sectors—1024 bytes are
reserved in the 64 kB devices
Digital Peripherals
- 24 or 16 port I/O; All 5 V tolerant with high sink
current and programmable drive strength-
- Hardware SMBus™ (I2C™ Compatible), 2 x SPI™,
and UART serial ports available concurrently
- Four general purpose 16-bit counter/timers
- Programmable 16-bit counter/timer array with six
capture/compare modules and watchdog timer
- Hardware SmaRTClock operates down to 0.9 V and
requires less than 0.5 µA supply current
Clock Sources
- Internal oscillators: 24.5 MHz, 2% accuracy
supports UART operation; 20 MHz low power
oscillator requires very little bias current
- External oscillator: Crystal, RC, C, or CMOS Clock
- SmaRTClock oscillator: 32 kHz Crystal or internal
self-oscillate mode
- Can switch between clock sources on-the-fly; useful
in implementing various power saving modes
Packages
- 32-pin QFN (5 x 5 mm)
- 24-pin QFN (4 x 4 mm)
- 32-pin LQFP (7 x 7 mm, easy to hand-solder)
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
A 10-bit
M
U
X
300 ksps
ADC
IREF
++
TEMP VREF
SENSOR VREG VOLTAGE
COMPARATORS
DIGITAL I/O
UART
SMBus
Port 0
2 x SPI
PCA
Timer 0
Port 1
Timer 1
Timer 2
Timer 3
Port 2
CRC
24.5 MHz PRECISION
INTERNAL OSCILLATOR
20 MHz LOW POWER
INTERNAL OSCILLATOR
External Oscillator
HARDWARE SmaRTClock
HIGH-SPEED CONTROLLER CORE
64/32 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
4352 B
SRAM
POR WDT
Rev. 1.4 11/13
Copyright © 2013 by Silicon Laboratories
C8051F93x-C8051F92x






C8051F921 Datasheet, Funktion
C8051F93x-C8051F92x
18.7.Flash Error Reset ........................................................................................... 189
18.8.SmaRTClock (Real Time Clock) Reset .......................................................... 189
18.9.Software Reset ............................................................................................... 189
19. Clocking Sources ................................................................................................. 191
19.1.Programmable Precision Internal Oscillator ................................................... 192
19.2.Low Power Internal Oscillator......................................................................... 192
19.3.External Oscillator Drive Circuit...................................................................... 192
19.3.1.External Crystal Mode............................................................................ 192
19.3.2.External RC Mode.................................................................................. 194
19.3.3.External Capacitor Mode........................................................................ 195
19.3.4.External CMOS Clock Mode .................................................................. 196
19.4.Special Function Registers for Selecting and Configuring the System Clock 197
20. SmaRTClock (Real Time Clock) .......................................................................... 200
20.1.SmaRTClock Interface ................................................................................... 201
20.1.1.SmaRTClock Lock and Key Functions................................................... 201
20.1.2.Using RTC0ADR and RTC0DAT to Access SmaRTClock Internal Registers
..................................................................................................... 202
20.1.3.RTC0ADR Short Strobe Feature............................................................ 202
20.1.4.SmaRTClock Interface Autoread Feature .............................................. 203
20.1.5.RTC0ADR Autoincrement Feature......................................................... 203
20.2.SmaRTClock Clocking Sources ..................................................................... 206
20.2.1.Using the SmaRTClock Oscillator with a Crystal or
External CMOS Clock ............................................................................ 206
20.2.2.Using the SmaRTClock Oscillator in Self-Oscillate Mode...................... 206
20.2.3.Programmable Load Capacitance.......................................................... 207
20.2.4.Automatic Gain Control (Crystal Mode Only) and SmaRTClock
Bias Doubling ......................................................................................... 208
20.2.5.Missing SmaRTClock Detector .............................................................. 210
20.2.6.SmaRTClock Oscillator Crystal Valid Detector ...................................... 210
20.3.SmaRTClock Timer and Alarm Function ........................................................ 210
20.3.1.Setting and Reading the SmaRTClock Timer Value .............................. 210
20.3.2.Setting a SmaRTClock Alarm ................................................................ 211
20.3.3.Software Considerations for using the SmaRTClock Timer and Alarm . 211
21. Port Input/Output.................................................................................................. 216
21.1.Port I/O Modes of Operation........................................................................... 217
21.1.1.Port Pins Configured for Analog I/O....................................................... 217
21.1.2.Port Pins Configured For Digital I/O....................................................... 217
21.1.3.Interfacing Port I/O to 5 V and 3.3 V Logic............................................. 218
21.1.4.Increasing Port I/O Drive Strength ......................................................... 218
21.2.Assigning Port I/O Pins to Analog and Digital Functions................................ 218
21.2.1.Assigning Port I/O Pins to Analog Functions ......................................... 218
21.2.2.Assigning Port I/O Pins to Digital Functions........................................... 220
21.2.3.Assigning Port I/O Pins to External Digital Event Capture Functions .... 220
21.3.Priority Crossbar Decoder .............................................................................. 221
21.4.Port Match ...................................................................................................... 227
6 Rev. 1.4

6 Page









C8051F921 pdf, datenblatt
C8051F93x-C8051F92x
List of Tables
Table 2.1. Product Selection Guide ......................................................................... 26
Table 3.1. Pin Definitions for the C8051F92x-C8051F93x ...................................... 27
Table 3.2. QFN-32 Package Dimensions ................................................................ 37
Table 3.3. PCB Land Pattern ................................................................................... 39
Table 3.4. QFN-24 Package Dimensions ................................................................ 40
Table 3.5. PCB Land Pattern ................................................................................... 42
Table 3.6. LQFP-32 Package Dimensions .............................................................. 43
Table 3.7. PCB Land Pattern ................................................................................... 44
Table 4.1.Absolute Maximum Ratings ..................................................................... 45
Table 4.2.Global Electrical Characteristics .............................................................. 46
Table 4.3.Port I/O DC Electrical Characteristics ...................................................... 54
Table 4.4.Reset Electrical Characteristics ............................................................... 59
Table 4.5.Power Management Electrical Specifications .......................................... 60
Table 4.6.Flash Electrical Characteristics ............................................................... 60
Table 4.7.Internal Precision Oscillator Electrical Characteristics ............................ 60
Table 4.8.Internal Low-Power Oscillator Electrical Characteristics ......................... 60
Table 4.9.ADC0 Electrical Characteristics ............................................................... 61
Table 4.10.Temperature Sensor Electrical Characteristics ..................................... 62
Table 4.11.Voltage Reference Electrical Characteristics ........................................ 62
Table 4.12.IREF0 Electrical Characteristics ............................................................ 63
Table 4.13.Comparator Electrical Characteristics ................................................... 64
Table 4.14.DC-DC Converter (DC0) Electrical Characteristics ............................... 66
Table 4.15.VREG0 Electrical Characteristics .......................................................... 66
Table 8.1. CIP-51 Instruction Set Summary .......................................................... 105
Table 10.1.AC Parameters for External Memory Interface .................................... 128
Table 11.1. Special Function Register (SFR) Memory Map (Page 0x0) ............... 129
Table 11.2. Special Function Register (SFR) Memory Map (Page 0xF) ............... 130
Table 11.3. Special Function Registers ................................................................. 131
Table 12.1. Interrupt Summary .............................................................................. 138
Table 13.1. Flash Security Summary .................................................................... 151
Table 14.1. Power Modes ...................................................................................... 159
Table 15.1. Example 16-bit CRC Outputs ............................................................. 168
Table 15.2.Example 32-bit CRC Outputs .............................................................. 170
Table 16.1. IPeak Inductor Current Limit Settings ................................................. 176
Table 19.1. Recommended XFCN Settings for Crystal Mode ............................... 193
Table 19.2. Recommended XFCN Settings for RC and C modes ......................... 194
Table 20.1.SmaRTClock Internal Registers .......................................................... 201
Table 20.2. SmaRTClock Load Capacitance Settings .......................................... 207
Table 20.3. SmaRTClock Bias Settings ................................................................ 209
Table 21.1. Port I/O Assignment for Analog Functions ......................................... 218
Table 21.2. Port I/O Assignment for Digital Functions ........................................... 220
Table 21.3. Port I/O Assignment for External Digital Event Capture Functions .... 220
Table 22.1. SMBus Clock Source Selection .......................................................... 243
12 Rev. 1.4

12 Page





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