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Teilenummer | C505C |
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Beschreibung | 8-Bit CMOS Microcontroller | |
Hersteller | Siemens | |
Logo | ||
Gesamt 70 Seiten C505
C505C
8-Bit CMOS Microcontroller
User's Manual 08.97
http://www.Datasheet4U.com
General Information
C505 / C505C
Table of Contents
Page
10
10.1
10.2
10.3
10.4
10.5
10.6
10.7
11
Device Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
A/D Converter Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
AC Characteristics (16 MHz) for C505 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-6
AC Characteristics (20 MHz) for C505 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-9
ROM Verification Characteristics for C505-2R . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-15
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-18
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1
Semiconductor Group
I-4
1997-08-01
6 Page Introduction
C505 / C505C
Table 1-1
Pin Definitions and Functions
Symbol
RESET
Pin Number
4
P3.0-P3.7 5, 7-13
5
7
8
9
10
11
12
13
*) I = Input
O = Output
I/O*) Function
I RESET
A high level on this pin for two machine cycles while the
oscillator is running resets the device. An internal diffused
resistor to VSS permits power-on reset using only an
external capacitor to VCC.
I/O Port 3
is an 8-bit quasi-bidirectional port with internal pull-up
arrangement. Port 3 pins that have 1’s written to them are
pulled high by the internal pull-up transistors and in that
state can be used as inputs. As inputs, port 3 pins being
externally pulled low will source current ( IIL, in the DC
characteristics) because of the internal pullup transistors.
The output latch corresponding to a secondary function
must be programmed to a one (1) for that function to operate
(except for TxD and WR ). The secondary functions are
assigned to the pins of port 3 as follows:
P3.0 / RxD
Receiver data input (asynch.) or data
input/output (synch.) of serial interface
P3.1 / TxD
Transmitter data output (asynch.) or
clock output (synch.) of serial interface
P3.2 / INT0
External interrupt 0 input / timer 0 gate
control input
P3.3 / INT1
External interrupt 1 input / timer 1 gate
control input
P3.4 / T0
Timer 0 counter input
P3.5 / T1
Timer 1 counter input
P3.6 / WR
WR control output; latches the data
byte from port 0 into the external data
memory
P3.7 / RD
RD control output; enables the external
data memory
Semiconductor Group
1-6
1997-08-01
12 Page | ||
Seiten | Gesamt 70 Seiten | |
PDF Download | [ C505C Schematic.PDF ] |
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