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PDF 3N62K3 Data sheet ( Hoja de datos )

Número de pieza 3N62K3
Descripción STB3N62K3
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! 3N62K3 Hoja de datos, Descripción, Manual

STB3N62K3, STD3N62K3, STF3N62K3
STP3N62K3, STU3N62K3
N-channel 620 V, 2.2 , 2.7 A SuperMESH3™ Power MOSFET
D2PAK, DPAK, TO-220FP, TO-220, IPAK
Features
Type
VDSS
RDS(on)
max
ID
PD
STB3N62K3
STD3N62K3
STF3N62K3
STP3N62K3
STU3N62K3
620 V
620 V
620 V
620 V
620 V
< 2.5
< 2.5
< 2.5
< 2.5
< 2.5
2.7 A
2.7 A
2.7 A(1)
2.7 A
2.7 A
45 W
45 W
20 W
45 W
45 W
1. Limited by package
100% avalanche tested
Extremely high dv/dt capability
Very low intrinsic capacitances
Improved diode reverse recovery
characteristics
Zener-protected
IPAK
3
2
1
3
2
1
TO-220
3
1
DPAK
3
1
D²PAK
3
2
1
TO-220FP
Figure 1. Internal schematic diagram
Application
Switching applications
Description
The new SuperMESH3™ series is obtained
through the combination of a further fine tuning of
ST's well established strip-based PowerMESH™
layout with a new optimization of the vertical
structure. In addition to reducing on-resistance
significantly versus previous generation, special
attention has been taken to ensure a very good
dv/dt capability and higher margin in breakdown
voltage for the most demanding application.
Table 1. Device summary
Order codes
Marking
Package
STB3N62K3
STD3N62K3
STF3N62K3
STP3N62K3
STU3N62K3
3N62K3
3N62K3
3N62K3
3N62K3
3N62K3
D²PAK
DPAK
TO-220FP
TO-220
IPAK
August 2009
Doc ID 14894 Rev 2
Packaging
Tape and reel
Tape and reel
Tube
Tube
Tube
1/20
www.st.com
20
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3N62K3 pdf
STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3
2 Electrical
characteristics
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source
breakdown voltage
ID = 1 mA, VGS = 0
IDSS
IGSS
VGS(th)
RDS(on
Zero gate voltage
VDS = Max rating
drain current (VGS = 0) VDS = Max rating, TC=125 °C
Gate-body leakage
current (VDS = 0)
VGS = ± 20 V
Gate threshold voltage VDS = VGS, ID = 50 µA
Static drain-source on
resistance
VGS = 10 V, ID = 1.4 A
Min. Typ. Max. Unit
620 V
1 µA
50 µA
± 10 µA
3 3.75 4.5 V
2.2 2.5
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1)
Forward
transconductance
VDS = 15 V, ID = 1.4 A
- 2.1 - S
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 25 V, f = 1 MHz, VGS = 0 -
385
55
6
pF
- pF
pF
COSS
(1)
eq
Equivalent output
capacitance
VGS = 0, VDS = 0 to 496 V
- 32.3 - pF
RG
Intrinsic gate
resistance
f = 1 MHz open drain
- 10 -
Qg Total gate charge
VDD = 496 V, ID = 2.7 A,
Qgs Gate-source charge VGS = 10 V
Qgd Gate-drain charge
(see Figure 17)
13 nC
- 2.5 - nC
7.5 nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Table 7.
Symbol
Switching times
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Test conditions
VDD = 310 V, ID =1.7 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 16)
Min.
-
Typ.
9
6.8
22
15.6
Max Unit
ns
ns
-
ns
ns
Doc ID 14894 Rev 2
5/20

5 Page





3N62K3 arduino
STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
Doc ID 14894 Rev 2
11/20

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