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PC28F512P30EFx Schematic ( PDF Datasheet ) - MICRON

Teilenummer PC28F512P30EFx
Beschreibung Micron Parallel NOR Flash Embedded Memory (P30-65nm)
Hersteller MICRON
Logo MICRON Logo 




Gesamt 70 Seiten
PC28F512P30EFx Datasheet, Funktion
512Mb, 1Gb, 2Gb: P30-65nm
Features
Micron Parallel NOR Flash Embedded
Memory (P30-65nm)
JS28F512P30BFx, JS28F512P30EFx, JS28F512P30TFx,
PC28F512P30BFx, PC28F512P30EFx, PC28F512P30TFx
JS28F00AP30BFx, JS28F00AP30TFx, JS28F00AP30EFx,
PC28F00AP30BFx, PC28F00AP30TFx, PC28F00AP30EFx,
RC28F00AP30BFx, RC28F00AP30TFx, PC28F00BP30EFx
Features
• High performance
• Easy BGA package features
– 100ns initial access for 512Mb, 1Gb Easy BGA
– 105ns initial access for 2Gb Easy BGA
– 25ns 16-word asychronous page read mode
– 52 MHz (Easy BGA) with zero WAIT states and
17ns clock-to-data output synchronous burst
read mode
– 4-, 8-, 16-, and continuous word options for burst
mode
• TSOP package features
– 110ns initial access for 512Mb, 1Gb TSOP
• Both Easy BGA and TSOP package features
– Buffered enhanced factory programming (BEFP)
at 2 MB/s (TYP) using a 512-word buffer
– 1.8V buffered programming at 1.46 MB/s (TYP)
using a 512-word buffer
• Architecture
– MLC: highest density at lowest cost
– Symmetrically blocked architecture (512Mb, 1Gb,
2Gb)
– Asymmetrically blocked architecture (512Mb,
1Gb); four 32KB parameter blocks: top or bottom
configuration
– 128KB main blocks
– Blank check to verify an erased block
• Voltage and power
– VCC (core) voltage: 1.7–2.0V
– VCCQ (I/O) voltage: 1.7–3.6V
– Standy current: 70µA (TYP) for 512Mb; 75µA
(TYP) for 1Gb
– 52 MHz continuous synchronous read current:
21mA (TYP), 24mA (MAX)
• Security
– One-time programmable register: 64 OTP bits,
programmed with unique information from Mi-
cron; 2112 OTP bits available for customer pro-
gramming
– Absolute write protection: VPP = VSS
– Power-transition erase/program lockout
– Individual zero-latency block locking
– Individual block lock-down
– Password access
• Software
25μs (TYP) program suspend
25μs (TYP) erase suspend
– Flash Data Integrator optimized
– Basic command set and extended function Inter-
face (EFI) command set compatible
– Common flash interface
• Density and Packaging
– 56-lead TSOP package (512Mb, 1Gb)
– 64-ball Easy BGA package (512Mb, 1Gb, 2Gb)
– 16-bit wide data bus
• Quality and reliabilty
– JESD47 compliant
– Operating temperature: –40°C to +85°C
– Minimum 100,000 ERASE cycles per block
– 65nm process technology
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
http://www.Datasheet4U.com






PC28F512P30EFx Datasheet, Funktion
512Mb, 1Gb, 2Gb: P30-65nm
Features
List of Tables
Table 1: Discrete Part Number Information ...................................................................................................... 2
Table 2: Standard Part Numbers ....................................................................................................................... 2
Table 3: Virtual Chip Enable Truth Table for Easy BGA Packages ........................................................................ 8
Table 4: TSOP and Easy BGA Signal Descriptions ............................................................................................ 15
Table 5: Bus Operations ................................................................................................................................. 17
Table 6: Command Codes and Definitions ...................................................................................................... 19
Table 7: Command Bus Cycles ....................................................................................................................... 22
Table 8: Device ID Information ...................................................................................................................... 25
Table 9: Device ID codes ................................................................................................................................ 26
Table 10: BEFP Requirements ........................................................................................................................ 29
Table 11: BEFP Considerations ...................................................................................................................... 29
Table 12: Status Register Description .............................................................................................................. 37
Table 13: Read Configuration Register ............................................................................................................ 39
Table 14: End of Wordline Data and WAIT State Comparison ........................................................................... 42
Table 15: WAIT Functionality Table ................................................................................................................ 42
Table 16: Burst Sequence Word Ordering ........................................................................................................ 43
Table 17: Example of CFI Output (x16 device) as a Function of Device and Mode ............................................. 48
Table 18: CFI Database: Addresses and Sections ............................................................................................. 49
Table 19: CFI ID String ................................................................................................................................... 49
Table 20: System Interface Information .......................................................................................................... 50
Table 21: Device Geometry ............................................................................................................................ 51
Table 22: Block Region Map Information ........................................................................................................ 51
Table 23: Primary Vendor-Specific Extended Query ........................................................................................ 52
Table 24: Optional Features Field ................................................................................................................... 54
Table 25: One Time Programmable (OTP) Space Information .......................................................................... 54
Table 26: Burst Read Information ................................................................................................................... 55
Table 27: Partition and Block Erase Region Information .................................................................................. 56
Table 28: Partition Region 1 Information: Top and Bottom Offset/Address ....................................................... 57
Table 29: Partition Region 1 Information ........................................................................................................ 57
Table 30: Partition Region 1: Partition and Erase Block Map Information ......................................................... 60
Table 31: CFI Link Information – 2Gb ............................................................................................................. 61
Table 32: Power and Reset .............................................................................................................................. 71
Table 33: Maximum Ratings ........................................................................................................................... 73
Table 34: Operating Conditions ...................................................................................................................... 73
Table 35: DC Current Characteristics .............................................................................................................. 74
Table 36: DC Voltage Characteristics .............................................................................................................. 75
Table 37: Test Configuration: Worst-Case Speed Condition .............................................................................. 76
Table 38: Capacitance .................................................................................................................................... 77
Table 39: AC Read Specifications .................................................................................................................... 78
Table 40: AC Write Specifications ................................................................................................................... 85
Table 41: Program and Erase Specifications .................................................................................................... 91
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
6 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.

6 Page









PC28F512P30EFx pdf, datenblatt
Figure 5: 64-Ball Easy BGA – 8mm x 10mm x 1.2mm
0.78 TYP
0.25 MIN
Seating
plane
0.1
1.00 TYP
64X Ø0.43 ±0.1
A
B
C
D
E
F
G
H
1.5 ±0.1
Ball A1 ID
87654321
0.5 ±0.1
8 ±0.1
1.00 TYP
512Mb, 1Gb, 2Gb: P30-65nm
Package Dimensions
Ball A1 ID
10 ±0.1
1.20 MAX
Notes: 1. All dimensions are in millimeters. Drawing not to scale.
2. The 512Mb device does not contain the A1 ID ball located on the back side of the de-
vice.
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
12
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.

12 Page





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