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ADUM3481 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADUM3481
Beschreibung 3.75 kV RMS Quad Digital Isolators
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 20 Seiten
ADUM3481 Datasheet, Funktion
Data Sheet
Small, 3.75 kV RMS Quad Digital Isolators
ADuM3480/ADuM3481/ADuM3482
FEATURES
Up to 25 Mbps data rate (NRZ)
Low propagation delay: 25 ns typical
Low dynamic power consumption
1.8 V to 5 V level translation
High temperature operation: 125°C
High common-mode transient immunity: >25 kV/µs
Output default select
20-lead, RoHS-compliant, SSOP package
Safety and regulatory approvals (pending):
UL recognition: 3750 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 560 V peak
APPLICATIONS
General-purpose multichannel isolation
SPI interface/data converter isolation
Industrial field bus isolation
GENERAL DESCRIPTION
The ADuM3480/ADuM3481/ADuM34821 are quad-channel
digital isolators based on the Analog Devices, Inc., iCoupler®
technology. Combining high speed CMOS and monolithic air
core transformer technology, these isolation components provide
outstanding performance characteristics superior to alternatives
such as optocoupler devices and other integrated couplers. With
typical propagation delay reduced to 25 ns, pulse width
distortion is also halved.
The four channels of the ADuM3480/ADuM3481/ADuM3482
are available in a variety of channel configurations with two data
rate grades up to 25 Mbps (see the Ordering Guide section). All
models use separate core and I/O power supplies. The core
operates between 3.0 V and 5.5 V, whereas the I/O supply can
range from 1.8 V to 5.5 V.If I/O operation is required within
the range of the core supply, the two supplies can be tied together
to allow single-supply operation. When the I/O must interface
with logic levels that are different from the core supply voltage,
the I/O supply operates independently of the core supply over
its wider range. The minimum I/O supply voltage is 1.8 V, which
allows compatibility with low voltage logic. Both core and I/O
supplies are required for proper operation.
FUNCTIONAL BLOCK DIAGRAMS
VDDL1 1 ADuM3480
GND1 2
20 VDDL2
19 GND2
VIA 3
ENCODE
DECODE
18 VOA
VIB 4
ENCODE
DECODE
17 VOB
VIC 5
ENCODE
DECODE
16 VOC
VID 6
ENCODE
DECODE
15 VOD
NC 7
VDD1 8
VDDC1 9
GND1 10
REG
REG
14 CTRL2
13 VDD2
12 VDDC2
11 GND2
Figure 1. ADuM3480
VDDL1 1 ADuM3481
20 VDDL2
GND1 2
19 GND2
VIA 3
ENCODE
DECODE
18 VOA
VIB 4
ENCODE
DECODE
17 VOB
VIC 5
ENCO DE
DECODE
16 VOC
VOD 6
DECODE
ENCODE
15 VID
CTRL1 7
VDD1 8
REG
14 CTRL2
REG
13 VDD2
VDDC1 9
12 VDDC2
GND1 10
11 GND2
Figure 2. ADuM3481
VDDL1 1 ADuM3482
GND1 2
VIA 3
ENCODE
DECODE
20 VDDL2
19 GND2
18 VOA
VIB 4
VOC 5
ENCODE
DECODE
DECODE
ENCODE
17 VOB
16 VIC
VOD 6
CTRL1 7
VDD1 8
VDDC1 9
GND1 10
DECODE
REG
ENCODE
15 VID
14 CTRL2
REG 13 VDD2
12 VDDC2
11 GND2
Figure 3. ADuM3482
1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Rev. 0
Information furnishedb yA nalogD evices isb elieved to beac curatea ndrel iable.H owever,n o
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One T echnology Way, P .O. Box 91 06, N orwood, M A 020 62-9106, U .S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.
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ADUM3481 Datasheet, Funktion
ADuM3480/ADuM3481/ADuM3482
Data Sheet
Table 6.
Parameter
DC SPECIFICATIONS
Input Voltage Threshold
Logic High
Logic Low
Output Voltages
Logic High
Logic Low
Input Current per Channel
Supply Current per Channel
Quiescent Supply Current
Regulator Input Side
I/O Input
Regulator Output Side
I/O Output
Dynamic Supply Current
Regulator Input Side
I/O Input
Regulator Output Side
I/O Output
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity1
Refresh Period
Symbol Min
Typ Max
Unit
Test Conditions/Comments
VIH 0.7 VDDLx
VIL
0.3 VDDLx
V
V
VOH VDDLx − 0.1 3.0
V
VDDLx − 0.4
2.8
V
VOL
0.0 0.1
V
0.2 0.4
V
II
−10
+0.01 +10
µA
IOx = −20 µA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 µA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDLx, 0 V ≤ VCTRLx ≤ VDDLx
IDDI (Q)
IDDIL (Q)
IDDO (Q)
IDDOL (Q)
IDDI (D)
IDDIL (D)
IDDO (D)
IDDOL (D)
tR/tF
|CM|
tr
25
0.36
0.019
1.21
0.021
0.5
0.050
1.7
0.050
0.070
0.53
0.010
0.013
3
35
1.66
mA
mA
mA
mA
mA/Mbps
µA/Mbps
mA/Mbps
mA/Mbps
ns
kV/µs
µs
10% to 90%
VIx = VDDLx, VCM = 1000 V,
transient magnitude = 800 V
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOL < 0.8 × VDDLx or VOH > 0.7 × VDDIx. The common-mode voltage slew
rates apply to both rising and falling common-mode voltage edges.
Rev. 0 | Page 6 of 20

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ADUM3481 pdf, datenblatt
ADuM3480/ADuM3481/ADuM3482
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VDDL1
GND1*
VIA
VIB
VIC
VID
NC
1
2
3
4
5
6
7
VDD1 8
VDDC1 9
GND1* 10
ADuM3480
TOP VIEW
(Not to Scale)
20 VDDL2
19 GND2*
18 VOA
17 VOB
16 VOC
15 VOD
14 CTRL2
13 VDD2
12 VDDC2
11 GND2*
NOTES
1. NC = NO CONNECTION. THIS PIN IS NOT
CONNECTED INTERNALLY AND CAN BE LEFT
FLOATING OR CONNECTED TO VDD1 OR GND1.
*PIN 2 AND PIN 10 ARE INTERNALLY CONNECTED.
CONNECTING BOTH TO PCB SIDE 1 GROUND IS
RECOMMENDED. PIN 11 AND PIN 19 ARE
INTERNALLY CONNECTED. CONNECTING BOTH
TO PCB SIDE 2 GROUND IS RECOMMENDED.
Figure 5. ADuM3480 Pin Configuration
Table 17. ADuM3480 Pin Function Descriptions
Pin No. Mnemonic Description
1 VDDL1 1.8 V to 5.5 V Supply Voltage for Isolator Side 1 Input/Output Circuits. Bypass VDDL1 to GND1 with a 0.01 µF to 0.1 µF
ceramic capacitor. For 3.0 V to 5.5 V input/output operation, VDDL1 can be connected directly to VDD1.
2
GND1
Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both to
the PCB ground plane as close to the part as possible is recommended.
3 VIA
Logic Input A.
4 VIB
Logic Input B.
5 VIC
6 VID
Logic Input C.
Logic Input D.
7 NC
No Connection. This pin is not connected internally and can be left floating or connected to VDD1 or GND1.
8 VDD1
3.0 V to 5.5 V Supply Voltage for Isolator Side 1.
9 VDDC1 Output Pin of an Internal Regulator for Side 1. Bypass VDDC1 to GND1 with a 0.01 µF to 0.1 µF ceramic capacitor. Do
not use this pin to power external circuits.
10 GND1 Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both to
the PCB ground plane as close to the part as possible is recommended.
11 GND2 Ground 2. Ground reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both to
the PCB ground plane as close to the part as possible is recommended.
12 VDDC2
Output Pin of an Internal Regulator for Side 2. Bypass VDDC2 to GND2 with a 0.01 µF to 0.1 µF ceramic capacitor. Do
not use this pin to power external circuits.
13 VDD2
3.0 V to 5.5 V Supply Voltage for Isolator Side 2.
14 CTRL2 Select Side 2 Output Default Level. Low = default output low. High = default output high.
15 VOD
Logic Output D.
16 VOC
Logic Output C.
17 VOB
Logic Output B.
18 VOA
Logic Output A.
19 GND2 Ground 2. Ground reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both to
the PCB ground plane as close to the part as possible is recommended.
20 VDDL2
1.8 V to 5.5 V Supply Voltage for Isolator Side 2 Input/Output Circuits. Bypass VDDL2 to GND2 with a 0.01 µF to 0.1 µF
ceramic capacitor. For 3.0 V to 5.5 V input/output operation, VDDL2 can be connected directly to VDD2.
Rev. 0 | Page 12 of 20

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