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PC33999 Schematic ( PDF Datasheet ) - Freescale Semiconductor

Teilenummer PC33999
Beschreibung 16-Output Switch
Hersteller Freescale Semiconductor
Logo Freescale Semiconductor Logo 




Gesamt 16 Seiten
PC33999 Datasheet, Funktion
Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Document order number: MC33999
Rev 1.0, 01/2004
Preliminary Information
33999
16-Output Switch with SPI and PWM
Control
The 33999 is a 16-output low-side switch with a 24-bit serial input control.
It is designed for a variety of applications including inductive, incandescent,
and LED loads. The Serial Peripheral Interface (SPI) provides both input
control and diagnostic readout. Eight parallel inputs are also provided for direct
Pulse Width Modulation (PWM) control of eight dedicated outputs.
Additionally, an output-programmable PWM input provides PWM of any
combination of outputs. A dedicated reset input provides the ability to clear all
internal registers and turn all outputs off.
The 33999 directly interfaces with microcontrollers and is compatible with
both 3.3 V and 5.0 V CMOS logic levels. The 33999, in effect, serves as a bus
expander and buffer with fault management features that reduces the MCU’s
fault management burden.
Features
• Designed to Operate 5.0 V < VPWR < 27 V
• 24-Bit SPI for Control and Fault reporting, 3.3 V/5.0 V Compatible
• Outputs Are Current Limited (0.9 A to 2.5 A) to Drive Incandescent
Lamps
• Output Voltage Clamp of +50 V During Inductive Switching
• On/Off Control of Open Load Detect Current (LED Application)
• VPWR Standby Current < 10 µA
• RDS(ON) of 0.55 at 25°C Typical
• Independent Overtemperature Protection
• Output Selectable for PWM Control
• Output ON Short-to-VBAT and OFF Short-to-Ground/Open Detection
• 54-Pin Exposed Pad Package for Thermal Performance
• Pb-Free Packaging Designated by Suffix Code EK
POWER DUAL OCTAL SERIAL
SWITCH WITH SERIAL
PERIPHERAL INTERFACE I/O
EK (Pb-FREE) SUFFIX
CASE 1390-01
54-LEAD SOICW EXPOSED PAD
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
PC33999EK/R2 -40°C to 125°C 54 SOICW-EP
3339399999SiSmSiimmpplpliiffliiieefdideAdApppAlipcpalptiicolianctDaioitaingoranDmiDaigargarmam
3.3 V/5.0 V
33999
VPWR
VBAT
VDD
MCU
SCLK
CS
MISO
MOSI
PWM
RST
SOPWR
VPWR
SCLK
CS
SI
SO
PWM
RST
PWM0
PWM1
PWM6
PWM7
PWM8
PWM9
PWM14
PWM15
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
GND
Solenoid/Relay
LED
Lamp
This document contains information on a product under development.
Motorola reserves the right to change or discontinue this product without notice.
© Motorola, Inc. 2004
For More Information On This Product,
Go to: www.freescale.com
http://www.Datasheet4U.com/






PC33999 Datasheet, Funktion
Freescale Semiconductor, Inc.
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions of 3.1 V SOPWR 5.5 V, 5.0 V VPWR 18 V, -40°C TC 125°C, unless otherwise
noted. Where applicable, typical values reflect the parameter’s approximate average value with VPWR =1 3V , TA =2 5°C.
Characteristic
Symbol
Min
Typ
Max
Unit
DIGITAL INTERFACE
Input Logic Voltage Thresholds (Note 14)
Input Logic Voltage Thresholds for RST
SI Pull-Down Current
SI = 5.0 V
VINLOGIC
VINRST
ISI
0.8
SOPWR / 2 - 0.7
2.0
SOPWR / 2
10
2.2
SOPWR / 2 + 0.7
30
V
V
µA
CS Pull-Up Current
CS = 0 V
ICS µA
-30 -10 -2.0
SCLK Pull-Down Current
SCLK = 5.0 V
ISCLK
µA
2.0 10 30
RST Pull-Down Current
RST = 5.0 V
IRST
µA
5.0 25 50
PWM and PWMn Pull-Down Current
SO High-State Output Voltage
ISO-high = -1.6 mA
SO Low-State Output Voltage
ISO-low = 1.6 mA
IPWM
VSOH
VSOL
2.0 10
SOPWR-0 .4 SOPWR -0.2
––
30
0.4
µA
V
V
Input Capacitance on SCLK, SI, Tri-State SO, RST (Note 15) CIN ––
20 pF
Notes
14. Upper and lower logic threshold voltage levels apply to SI, CS, SCLK, PWM, and PWMn.
15. This parameter is guaranteed by design but is not production tested.
33999
6
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6 Page









PC33999 pdf, datenblatt
Freescale Semiconductor, Inc.
ON/OFF Control Register
To program the 16 outputs of the 33999 ON or OFF, a 24-bit
serial stream of data is entered into the SI pin. The first 8 bits
of the control word are used to identify the on/off command and
the remaining 16 bits are used to turn ON or OFF the specific
output driver.
Open Load Current Enable Control Register
The Open Load Enable Control register is provided to enable
or disable the 50 µA open load detect pull-down current. This
feature allows the device to be used in LED applications.
Power-ON Reset (POR) or the RST pin or the RESET
command disables the 50 µA pull-down current. No open load
fault will be reported with the pull-down current disabled. For
open load to be active, the user must program the Open Load
Current Enable Control register with logic [1].
Global Shutdown/Retry Control Register
The Global Shutdown/Retry Control register allows the user
to select the global fault strategy for the outputs. The
Overvoltage control bit (bit 16) sets the operation of the outputs
when returning from overvoltage. Setting the Overvoltage bit to
logic [0] will force all outputs to remain OFF when VPWR returns
to normal level. Setting the Overvoltage bit to logic [1] will
command outputs to resume their previous state when VPWR
returns to normal level. Bit 17 is the global thermal bit. When
bit 17 is set to logic [0], all outputs will shut down when thermal
limit is reached and remain off even after cooled. With bit 17 set
to logic [1], all outputs will shut down when thermal limit is
reached and will retry when cooled.
Short Fault Protect Disable (SFPD) Control Register
All outputs contain a current limit and thermal shutdown with
programmable retry. The SFPD control bits are used for fast
shutdown of the output when an overcurrent condition is
detected but thermal shutdown has not been achieved.
The SFPD Control register allows selection of specific
outputs for incandescent lamp loads and specific outputs for
inductive loads. By programming the specific SFPD bit as
logic [1], output will rely on Overtemperature Shutdown only.
Programming the specific SFPD bit as logic [0] will shut down
the output after 100 µs to 450 µs during turn on into short
circuit. The decision for shutdown is based on output drain-to-
source voltage (VDS)> 2.7V . This feature is designed to
provide protection to loads that experience more than expected
currents and require fast shutdown. The 33999 is designed to
operate in both modes with full device protection.
PWM Enable Register
The PWM Enable register determines the outputs that are
PWM controlled. The first 8 bits of the 24 bit SPI message word
are used to identify the PWM enable command, and the
remaining 16 bits are used to enable or disable the PWM ofthe
output drivers.
A logic [1] in the PWM Enable register allows the user to OR/
AND the PWM input with SPI Control bit and disables the
specific parallel control input (PWM0, PWM1, PWM6, PWM7,
PWM8, PWM9, PWM14, and PWM15).
A logic [0] in the PWM Enable register will disable the PWM
to a specific output and allow the user to use the parallel PWM
control inputs (PWM0, PWM1, PWM6, PWM7, PWM8, PWM9,
PWM14, and PWM15) and the SPI ON/OFF Control bits.
Power-ON Reset (POR) or the RST pin or the RESET
command will set the PWM enable register to logic[0].
AND/OR Control Register
The AND/OR Control register describes the condition by
which the PWM pin controls the output driver. A logic [0] in the
AND/OR Control register will AND the PWM pin with the control
bit in the SPI Control register. Likewise, a logic [1] in the AND/
OR Control register will OR the PWM pin with the control bit in
the ON/OFF Control register (see Figure 6).
On/Off Control Bit
On/Off Control Bit
PWM Enable Bit
PWM IN
AND/OR Control Bit
To Gate
Control
On/Off control Bit
PWM IN
Figure 6. PWM Control Logic Diagram
Serial Output (SO) Response Register
Fault reporting is accomplished through the SPI interface. All
logic [1]s received by the MCU via the SO pin indicate fault. All
logic [0]s received by the MCU via the SO pin indicate no fault.
All fault bits are cleared on the positive edge of CS. SO bits 15
to 0 represent the fault status of outputs 15 to 0. SO bits 21 to
16 will always return logic [0]. Bit 22 provides overvoltage
condition status, and bit 23 is set when any fault is present in
the IC. The timing between two write words must be greater
than 450 µs to allow adequate time to sense and report the
proper fault status.
Reset Command
The RESET command turns all outputs OFF and sets all
internal registers to their Power-ON Reset state (refer to
Table 1).
33999
12
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